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Program Booklet

Live Program CET – Central European Time

Complete Program

Day 1 - Monday, 01. March 2021

10:15 - 10:55

Keynote 1 Conference Keynote Dr. Reinhard Ploss

Parallel Sessions

11:00 - 12:45

Session 1.1 IoT Architectures & Platforms

11:00 - 11:30

The Automotive Paradigm Shift: Connectivity at the Core Pedro Lopez Estepa, Real-Time Innovations (RTI)

The automotive industry is undergoing an unprecedented paradigm shift as manufacturers race to develop Connected and Autonomous mobility solutions. Auto manufacturers now compete on software and must explore new opportunities in addition to evolving their core business. The autonomous vehicle connectivity software paradigm is challenging and for many, is still undefined. Since vehicles are built from many subsystems, they require full interoperability between components, both in and off the vehicle. Worse, autonomous vehicle designs must last for years so automakers must ensure that their systems anticipate future challenges, including security and safety requirements. Together, these challenges make connectivity a key cost, challenge, requirement and risk point. This paper will present an overview of the expected automotive software landscape evolution as well as the major architectural decisions that vehicle manufacturers must consider to guide their success.

11:30 - 12:00

ACRN: Bridging Orchestrator and Hard Realtime Workload Consolidation Peter Fang, Intel

As edge computing and smart factories continue to gain traction, the demand for the consolidation and orchestration of mixed and critical workloads has never been higher. The IoT/industrial sector faces a diverse range of challenges, from real-time to flexibility. Since its announcement in 2018, ACRN has rapidly evolved and continued to build momentum in the industry with its lightweight architecture and focus on real-time and functional safety usage. Designed with flexibility in mind from the start, ACRN is highly adaptable and manages resources safely and in isolation in various fashions, making it ideal for deployment at the IoT edge and in smart factories. To facilitate deployment, the ACRN community has added libvirt and Kata to its latest offering, enabling a myriad of orchestration software stacks in the cloud and IoT space. In this talk, Peter will introduce how ACRN bridges the orchestrator and realtime workload consolidation to satisfy the needs of industrial IoT.

12:00 - 12:30

Architecting Scalable Real-time Systems With Embedded Devices: Connecting the Edge to the Cloud Thijs Brouwer, Real-Time Innovations (RTI)

Integrating resource-constrained devices in a distributed real-time system may pose significant design challenges. To reduce power and size, these boards have been built with minimal resources for communication software. Two recent developments are now helping to address these challenges. First, the DDS-XRCE protocol, which was recently adopted as an open standard by the Object Management Group, leverages the benefits of DDS for communication with small embedded devices. Second, to manage evolving requirements, the Industrial Internet Consortium has recommended that IIoT applications implement the Layered Databus Architecture. Here, we will demonstrate how DDS-XRCE enables these devices to be treated as if they were normal DDS participants. Together with the Layered Databus Architecture, full integration of these entities is achieved, allowing for flexible communications and scalability at all levels - from the edge to the cloud.

12:30 - 12:45

Discussion/Q&A with Session Chair: Dr. Christoph Rathfelder

11:00 - 12:45

Session 2.1 Wired Fieldbus

11:00 - 11:30

CAN XL – the Next Generation of CAN Holger Zeltwanger, CAN in Automation (CiA)

The paper introduces the features of the CAN XL protocol including the SDU type and all the other features usable for higher-layer protocols. CAN XL separates the priority functions (11-bit ID) and the addressing (32-bit acceptance field). In order to achieve a reliable communication (true Hamming distance of 6), the CAN XL protocol introduced a cascaded CRC protection. The maximum payload per data frame is 2048 byte. CAN XL is highly scalable regarding bit-rates and the medium-independent physical sub-layer. CAN XL controllers can be used with CAN high-speed and CAN SIC tranceivers as well as with CAN XL SIC transceivers providing the MICI interface supporting bit-rates of 10 Mbit/s and more. The paper describes also the future developments of intended higher-layer protocols, for example support of the ISO 15765-2/5 standards as well as homogeneous and heterogeneous multi-PDUs (protocol data unit).

11:30 - 12:00

10BASE-T1L Based Connection for Field Devices in Cyber-Physical Systems: A Proof of Concept Victor Chavez, FH Aachen

The current trend in Cyber-Physical Systems is to build flexible and interoperable systems that can be integrated seamlessly. Within this context, new standards and technologies are being developed. One of these upcoming technologies is the 10BASE-T1L 802.3cg-2019 ethernet physical layer. It consists of a single twisted pair cable that can deliver power and information up to a distance of 1 kilometer. This paper presents a proof of concept to evaluate 10BASE-T1L connectivity with field devices and identify how it could be implemented into current Cyber-Physical Systems. Our proposal consists of adapting the IO-Link standard to support 10BASE-T1L and take advantage of IO-Link features such as parametrization, diagnostics and plug & play. The work covers the development of a custom IO-Link device with 10BASE-T1L ethernet support and a bridge that translates this information for use with an IO-Link master in an automation system demonstrator.

12:00 - 12:30

IO-Link as the Catalyst for Industrial IoT Florian Bader, AIT; Dominik Deschner, Stego

IO-Link is the future standard for digital communication in the field. It is not only a digital standard but also the catalyst for industrial IoT by providing an easy and cost efficient integration into existing automation systems and a whole ecosystem around it. Because of this we chose IO-Link as the basis for our own IIoT solution. In this session we want to show you our journey and the learnings we had from knowing nothing about IoT to building our first prototype till implementing a scalable IIoT solution in the cloud. Learn how IO-Link can help you reach your goal of digitalizing your business.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Dirk Pesch

11:00 - 12:45

Session 3.1 OS Basics

11:00 - 11:30

Track Keynote: Using Future Proofed Microcontroller Designs With FreeRTOS Richard Barry, Amazon Web Services

Today, we're seeing an amazing dynamic between the edge and the cloud, and where customers are putting their workloads. Many applications rely on the physical world around us where microcontrollers continue to prove to have a dominant place. Customers are looking for higher degrees of composability and robust RTOS support. In this talk, we will discover how to overcome challenges in development acceleration while ensuring firmware integrity and longevity, how that ties into our Long Term Support releases, and what that means for an open source project that has been in development for more than 15 years.

11:30 - 12:00

Operating Systems for Embedded Applications Colin Walls, Mentor, a Siemens Business

Most modern embedded applications employ and operating system of some sort. We will look at how operating systems work - the scheduler and various services provided by an OS to the application code - and at the options open for OS selection. We will also compare the use of commercial, open source and in-house products and consider multicore.

12:00 - 12:30

Increasing Resilience to Cyberattacks Through Advanced Use of Static Code Analysis Dr. Martin Becker, The MathWorks

Embedded devices are suffering from an increasing number of cyberattacks, across all industries and products. This trend is continued even though many developers already use static code analysis and proof in addition to dynamic testing. In this paper we identify common reasons for this trend, and propose techniques to address the underlying issues such that the attack resilience of embedded software can be increased. Specifically, we provide guidance on (1) which vulnerabilities can(not) be found by static code analysis, (2) how to control analysis context & setup to find more vulnerabilities and (3) how to support root cause analysis and reduce False Positives in library code. We also discuss how to apply these techniques gradually, to harden legacy software. Our findings are based on a case study on the FreeRTOS operating system, where we found that more than 80% of the reported vulnerabilities could have been prevented with clever use of a static code analyzer.

12:30 - 12:45

Discussion/Q&A with Session Chair: Peter Heusinger

11:00 - 12:45

Session 4.1 Safety & Security: Safety Processes and Standards

11:00 - 11:30

Impact of the 3rd Edition of IEC 61508-1/-2 on Your Development Stephan Aschenbrenner, exida.com

IEC 61508 is going through its 2nd maintenance process. As a Basic Safety Publication, changes in this standard will have an impact on application specific standards and the development of new products. This presentation gives an overview of the planned modifications and highlights the most important parts and their possible impact on current and future developments. The 3rd edition of IEC 61508 will update the requirements for the development and selection of complex semiconductors, will improve the topic of common cause failures and specify how to treat the failing of diagnostics. The requirements on tool classification / qualification will be extended. What does that mean for your development? You might need to do a better tool classification / qualification, common cause failures need to be analyzed more systematically and you might need to reconsider your selection of semiconductors. Does IEC 61508 require a Safety Case? Do I need to calculate the SFF on element / subsystem level?

11:30 - 12:00

Update on Maintenance of IEC 61508-3 for Safety Software Michael Kindermann, Pepperl+Fuchs

IEC 61508 is the Series of Standards that defines the use of Safety Functions within Industrial Applications to reach certain Levels of Risk Reduction known as Safety Integrity Levels SIL. The Need to update this Series of International Standards was identified by many nationally responsible Entities, leading to the Start of National and International Efforts to work on certain identified Topics. For Germany, members of the DKE Committee GAK 914.0.3 and others support the Updates related to Safety Software. This Presentation gives an Overview of the treated Topics and an Outline of discussed Proposals. It adds progress made since last year and extends amongst others on human factors and AI.

12:00 - 12:30

SIL and ASIL – is that Really the Principal Difference Between Safety for Plants and Safety for Cars? Andreas Weber, Altran; Johannes Schmidt, University of Applied Sciences Darmstadt

Plant engineers and automotive engineers use different terms and definitions for functional safety within their distinctive sectors of technology, e.g. ASIL instead of SIL. But what more do engineers who cope with challenges in both industrial world and automotive world need to consider? In this talk we will take a look into the differences between the basic safety publication IEC 61508 and the standard for the automotive business, ISO 26262. Scouting these standards will include a comparison of the fundamentals in scope definition, safety lifecycle and concepts as well as an evaluation of probably the most popular safety system in automotive: the airbag system. Firstly, the airbag system is evaluated with the tailored tools provided by ISO 26262 for the automotive industry. Secondly, the airbag system is evaluated rather unconventionally using the tools of IEC 61508. We will then discuss the differences in hazard analysis, risk assessment and architectural design. This talk is interesting for those who have to cope with challenges in both industrial world and automotive world – for instance component manufacturers who develop for both sectors – and for everyone interested in very basic considerations about functional safety.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Matthias F. Wagner

11:00 - 12:45

Session 5.1 Hardware Basics

11:00 - 11:30

Interfacing to Current Transformers George Slama, Wurth Elektronik eiSos

Measuring current is an important aspect of energy management. Current measurements can be used for safety, control or monitoring. Whether it is within a power supply or external to it, measuring ac currents (unipolar or bipolar, sinusoidal or rectangular) with isolated current sense transformers looks easy but does require attention to a few important details. A quick search reveals more than a dozen similar looking circuits. Why so many circuits and what is the difference. Which is the right one? Where are the measurement errors? What precautions to use for protecting the analog to digital converter and microcontroller? This session explains how the current transformer is different and sorts through the most common circuits to help you decide which is correct for your application.

11:30 - 12:00

Reference Potential and Current Displacement on Ground Lines Thomas Eichstetter, Essentielle Elektronik Eichstetter

In many PCB designs, signals are transmitted on unbalanced lines. The return conductor of the current is the ground. Since currents on a line inevitably lead to a voltage drop, EMC-critical products are created if the design is incorrect. Currently applied measures are replaced by fundamental knowledge, so that the developer knows where to define the reference point of the ground properly. A simple experiment explains the complex functionality of potential equalisation in interaction with the potential reference. In addition, the current displacement on multilayers is investigated in more detail. This is because from the cut-off frequency onwards, a large part of the current no longer flows on all ground layers, but only on the layer directly below. The effect of this effect is made clear.

12:00 - 12:30

Single Pair Ethernet Filter Design (part 2) Martin Leihenseder, Würth Elektronik eiSos

In the year after the presentation of the first SPE filter design with transformers, WÃ¼rth Elektronik eiSos conducted further research, measurement and simulation to develop different filter solutions for the market. Besides MDI requirements given by IEEE802.3, there are criteria, such as PCB size and signal droop, that need to be taken into consideration. These requirements are dependent on power rating or signal speed. For example, for power over data line (PoDL) the transformer inductance needs to be increased, while parasitic effects need to be decreased for 1000BASE-T1. The presentation explains our design considerations and shows detailed measurements for different filter topologies from connector to PHY chip to fulfil all necessary EMI and safety requirements according to IEEE 802.3cg (10BASE-T1L), IEEE802.3bp (1000BASE-T1) and IEEE802.3bu (Power over Data Line).

12:30 - 12:45

Discussion/Q&A with Session Chair: Dr. Bernd Hense

11:00 - 12:45

Session 6.1 Software & Systems-Egineering: Languages & Standards

11:00 - 11:30

Selecting a Coding Standard – or Build Your Own? Mark Richardson, LDRA

A software coding standard is critically important for software consistency, clarity, and testability across any software development organization. The right coding standard can make a development team more productive, able to reuse trusted existing code components, and produce higher quality software. But as Andrew S. Tanenbaum observed, 'the nice thing about standards is that there are so many to choose from.'

11:30 - 12:00

Managing the Risk of Adopting Third Party Code in a Functional Safety Context Martin Woodhall, LDRA

Much of the ecosystem surrounding safety- and security-critical embedded software has evolved with an expectation that systems are developed from scratch by leveraging well-defined requirements, coding standards, a controlled development phase, and a coherent test regime. But today's typical complex system is a tangle of home grown, auto-generated, legacy, open source and commercial off-the-shelf software. In tacit recognition, functional safety standards such as ISO 26262 (part 8) and IEC 62304 (§5.1.5, 5.1.7, etc.) give guidance for the use of 3rd party software (3PS) components, while MISRA's Compliance discusses how to meet the MISRA C/C++ guidelines in adopted code. This paper summarizes available guidance for working with 3PS across the sectors, discusses current best practice for ensuring acceptable levels risk in its deployment, and proposes a practical workflow from requirements engineering through to validation and verification.

12:00 - 12:30

Is Golang (Go) a Suitable Programming Language for IoT Applications? Stefan Wellnitz, DH electronics

Pros and cons of the modern programming language. The digital world provides a number of challenges for today's developers: increasing computing power, more complex systems, a variety of communication technologies and devices with a connection to the cloud. At the same time there is less time for prototyping but it is becoming more time-consuming for developers to find suitable libraries and frameworks in the classic programming languages. Outdated versions and invalid licenses are also a problem. Therefore, we need a modern programming language to meet the demands of our digital world. As Golang (Go) is gaining more importance especially for IoT applications we want to take a closer look at its advantages and disadvantages and report about our experiences in certain projects. We want to encourage you to consider Go for your next projects and give you a number of useful tips along the way.

12:30 - 12:45

Discussion/Q&A with Session Chair: Andrew Banks

Parallel Sessions

13:30 - 15:15

Session 1.2 IoT Architectures & Platforms

13:30 - 14:00

Track Keynote: Get More Productivity With Cloud Services Reinhard Keil, Arm

Today most embedded applications are still created on desktop computers. This has many reasons but is primarily caused by the validation process that relies heavily on target hardware. For other applications cloud computing is well established. During this talk you will learn how cloud-based tools can help to improve the development flow for embedded. It starts during product evaluation, includes model- or simulation-based validation with continuous integration flows, model optimization for machine learning, up to device provisioning for deployment.

14:00 - 14:30

Cloud-enabled IoT Device Made Simple! Stefan Vaillant, Software AG

The presentation introduces the Thin Edge Framework, an open source framework for IoT gateways, PLC's, routers and other embedded devices. The framework includes modules for cloud connectivity, data mapping, device management, intra-edge communication, and certificate management. With a few commands, it is now possible to easily integrate a wide range of embedded devices into cloud platforms. The Thin Edge Framework enables Plug & Play Connectivity with various cloud platforms. The device management module allows for seamless integration of your device with cloud based device management features such as over-the-air (OTA) software & firmware management, device monitoring, device twin and configuration management. This enables you to easily move your workloads from the cloud right to the edge. This framework has been developed by leading industrial companies and is available as an Open Source project free of charge.

14:30 - 15:00

Curl is the Internet Data Transfer Engine Daniel Stenberg, wolfSSL

Curl and its Internet transfer engine libcurl run in some ten billion installations world-wide in everything from cars, printers, TVs, phones, tablets to medical devices, kitchen tools and tiny IoT devices. It has become almost a de facto standard as *the* Internet transfer library. This is a presentation on how libcurl works, how it become like this, why it is this wildly popular and how it will continue to be a major component in Internet connected devices in the future.

15:00 - 15:15

Discussion/Q&A with Session Chair: Dr. Christoph Rathfelder

13:30 - 15:15

Session 2.2 TSN

13:30 - 14:00

Track Keynote: TSN as the Key Enabler for Converged Networks: Current Status and Challenges Florian Frick, ISW Uni Stuttgart

The emerging digitalization across industries has a significant impact on the requirements of communication systems. The typical combination of standard IT and proprietary real-time systems often does not allow for the integration of innovative solutions. Instead, converged communication systems, combining the connectivity and flexibility of IT systems and the deterministic guarantees of OT systems are required. Time Sensitive Networking (TSN) is accepted as the key enabling technology for future converged real-time networks across industries: from industrial automation to automotive to data centers. Even though an increasing number of standards are being published, real-world deployments are rare. A key reason for this is that TSN itself can only be a part of a solution and further standards are required to create an interoperable eco-system up to the application layer. Numerous initiatives are working on solutions, nevertheless, there are still major challenges ahead. The presentation will review the current status of the TSN standards themselves, while also looking at the big picture and related standards and activities, including profiles, higher layer protocols and other base technologies. Key challenges of TSN and its usage in different industries and especially complimentary standards to create eco-systems will also be discussed. In addition to the status and challenges, the presentation will also help to understand where opportunities are and when it might be the best time to get started depending on your own business.

14:00 - 14:30

Bridging Wired and Wireless Time Sensitive Networking: Opportunities and Challenges Dr. Dave Cavalcanti, Intel

Timeliness has become important across Industrial automation, AR/VR & robotics use cases. Time Sensitive Networking (TSN) standards provide high reliability & determinism, for emerging time-critical use cases across wired (Ethernet) & wireless (Wi-Fi & 5G) networks. Time critical hard/soft real time applications typically run over wired TSN links. Newer gen Wi-Fi 5/6 and 5G technologies, with TSN provides high reliability (e.g. 99%+) and low latencies (e.g. < 10 ms). Wired & wireless networks need to be bridged together to ensure end to end determinism. This is true for industrial systems combining fixed & mobile devices, such as edge computing control processes & automated mobile robots across factory floor to enable next gen mobile time-critical use cases. We discuss challenges in bridging wireless to wired TSN and provide results of live testing. We describe a real-time human-robot imitation and control Wi-Fi testbed proving feasibility of industrial tasks with low latency wireless.

14:30 - 15:00

Open Source Software Technology for TSN Resource Management Boon Leong Ong, Intel

TSN focuses on four important pillars: time synchronization, bounded low latency, reliability and resource management. While IEEE TSN standards for the first three are relatively well defined, industry is seeing a mix of both proprietary and open-source software implementation for resource management. There are three TSN network configuration models defined in IEEE 802.1Qcc: distributed, hybrid and fully centralized. The network configuration is based on data-model driven management, i.e. YANG model as chosen by 802.1Qcp. 802.1Qcw defines YANG model definitions for time-aware shaper, pre-emption and per-stream filtering/policing for TSN bridges and on-going work on 802.1Qdj focuses on User-Network Interface data exchange. This paper provides technological evaluation on TSN resource management standards, the adequacy of open-source software for TSN configuration and proposes technology development direction to enable TSN adoption in real-time industrial control networks.

15:00 - 15:15

Discussion/Q&A with Session Chair: Prof. Dr. Jörg Abke

13:30 - 15:15

Session 3.2 OS Basics

13:30 - 14:00

How Does an IoT OS Differ to a Traditional RTOS? Stefano Cadario, Arm

IoT software development is highly complex, spanning a diverse range of use cases, workloads and hardware. Add machine learning to the mix and the complexity for software developers doubles. A reliable operating system that supports multiple cloud services, security and machine learning capabilities is critical to help developers innovate in this new world of IoT and ML. This session will demonstrate how the latest advancements in IoT operating systems can accelerate the time from prototype to production as well as provide the required set of functionalities needed to manage and maintain the device once deployed in the field. This presentation will cover: -How to successfully move from prototype to production Security vulnerability management -Cloud connectivity and over-the-air updates -Machine learning model optimization, deployment and management

14:00 - 14:30

Building Secured, Connected, Real-Time Devices, With Microsoft Azure Sphere and Azure RTOS Sylvain Ekel, Microsoft; Mike Hall, Microsoft

Together, Azure Sphere and Azure RTOS are the ideal solution for developers wanting to quickly build highly secured IoT devices with real-time processing capabilities. Many connected devices require small and fast real-time processing components that Azure RTOS offers. With Azure Sphere, these devices are secured by default and stay secured against evolving security threats. The session will show how Azure Sphere handles the most demanding device security requirements, while Azure RTOS handles the most demanding real-time and safety-critical aspects. We will drill down in the architecture, software capabilities and management capabilities of a self-load balancing robot.

14:30 - 15:00

Design Patterns in RTOS Based Applications Jacob Beningo, Beningo Embedded Group

RTOSes are a core and fundamental component in many embedded systems today but application design patterns and techniques are not widely known or discussed. In this session, we will explore how to design an RTOS based application architecturally and then dive into the application code to develop several design patterns to improve reusability and scalability. Techniques that will be discussed include data flow patterns, managing shared data resources, simplifying configuration and how to validate the application design.

15:00 - 15:15

Discussion/Q&A with Session Chair: Peter Heusinger

13:30 - 15:15

Session 4.2 Safety & Security: Safety Processes & Standards

13:30 - 14:00

Model-based Top-down Flow for Safety related Automotive Battery Management Ics Dr. Ralph Görgen, NXP Semiconductors Germany; Markus Hafermalz, NXP Semiconductors

The paper describes a model-based top-down development flow for automotive semiconductor products in safety related battery management applications. Where other semiconductor flows work mainly bottom-up on silicon faults, we concentrate first on functionality to achieve functional safety. Starting from top level requirements, a function-oriented break-down of the system behavior is modelled in SysML. It enables model-based safety analyses that indicate where malfunctions can impact the system behavior and mitigation is required to ensure system safety. This is followed by step-by-step refinement in similar phases: the model is refined according to the requirements, then an analysis step is done that leads to new requirements. Finally, this results in an IC architecture that fulfills the safety requirements and therefore implements the safety concept. The flow is illustrated by a novel battery monitoring IC architecture that supports high safety demands as well as high performance.

14:00 - 14:30

A Proposed Risk-based Approach to ISO 26262 Tool Error Detection and Tool Qualification Priyasloka Arya, LDRA

The software tool qualification process mandated by ISO 26262:2011 Part 8 §11.4.3.1 requires consideration of the operational environment, evaluation criteria, and use-cases. Tool Impact (TI) and Tool Error Detection (TD) classes are assigned, and a Tool Confidence Level (TCL) derived from them. The rigor of tool qualification processes is then proportionate to the TCL. The process to determine a TD class is subjective and qualitative. This paper will propose a risk-based approach using FMECA (Failure Mode Effects and Criticality Analysis) to determine a high, medium or low degree of confidence in the prevention and detection of error or malfunction. It will argue that the approach would be applicable to both ISO 26262 and SAE J3061 processes, and that it would bring harmonization and objectivity to TD. The paper will conclude by exploring the further use of FMECA in the failure analysis of cascaded and tethered tools, and for the avoidance of common causes.

14:30 - 15:00

A Showcase for Model Based Code Generation for Multicore Safety Systems Prof. Dr. Peter Fromm, Darmstadt University of Applied Sciences

Most safety standards recommend the application of formal or semi-formal modelling standards for the architectural phase. Although many modelling standards do exist, ranging from the widely used UML/SYSML to domain specific notations like AUTOSAR or tool specific solutions like Matlab/Simulink, the systematic use still lacks in many projects, especially in combination with code generation. • Existing modelling notations often do not address safety relevant resource modelling (memory, CPU, peripherals). • Code generation is limited to only parts of the system (e.g. classes, individual algorithms or RTE’s). • Especially domain specific solutions often require specific RTOS, MCALS or toolchains, which might not be the perfect choice for a specific project. In this paper, we will present the results of the ZIM project “Safe and Secure”. Based on the SYSML block diagram, a signal flow oriented modelling notation has been developed. We will demonstrate how to model a safety control application and how we can generate a complete project framework consisting of communication objects, triggers, tasks, linker description files and MPU configurations. All artefacts can be generated for different controllers (Multicore Aurix and ARM Cortex), operating systems (PXROS, FREERTOS MPU, AUTOSAR) and programming languages (C/C++) using a flexible template based approach.

15:00 - 15:15

Discussion/Q&A with Session Chair: Ingo Rolle

13:30 - 15:15

Session 5.2 Hardware Development

13:30 - 14:00

Fast Prototyping with Embedded Super Computers Alexey Gromov, ZHAW Institute of Embedded Systems

Due to the ever-increasing complexity of today's embedded computers, the development of a fully customized device is time and resource intensive. In order to shorten the time to market, the Institute of Embedded Systems has created a modular open source architecture that allows the design of application specific hardware without expensive developments. Only the necessary interface modules (e.g. MIPI converter, different USB types, network, video-out) are selected and the hardware costs are optimized for each specific case. For special needs a simple additional interface module can be developed based on the standardized specifications instead of a complete redesign of the platform. Using Nvidia Xavier as an example, we share our experience with this modular, interface-driven approach and show how it has changed our development process. A comparison to the classic customer-specific board design is given in terms of hardware costs and development time.

14:00 - 14:30

Bluetooth Commercial Antenna Performance in Real World Wearable Applications Dr. Matthew Magill, Queen's University Belfast

This paper experimentally demonstrates the critical effects antenna choice has on the wireless performance of wearable devices operating within the 2.45 GHz ISM band. Human body effects are investigated on a range of commercially available compact Bluetooth antennas, widely used in wearable and IoT devices. Bulk power absorption and a significant reduction of up to 90% (10 dB) in radiation efficiency is shown using lab based measurements. All antennas are then compared in-situ in a real-world deployment environment, with each test antenna embedded in identical coin cell battery powered BLE5 transmitter modules, mounted on the human body to simulate a practical use case. The received power from each wearable module is analysed in a dynamic movement sport scenario. Results show that communication range and link reliability is highly dependent on antenna selection in unison with the subjects body orientation relevant to the receiver. Recommendations to overcome these issues are then made.

14:30 - 15:00

Textile Circuits – Making Textiles Smart Kay Ullrich, Textilforschungsinstitut Thüringen-Vogtland e.V.

Flexible circuit boards can be used in many areas, from automotive interior, to medical textiles and smart home applications. The researchers at TITV Greiz are exploring how to produce them efficiently, while ensuring that they are reliable, robust, bendable and flexible. The paper will discuss research results with regard to both – populating flexible circuit boards with electronical components, as well as reliability testing. The former includes developing innovative technologies for manufacturing of conductive threads, embroidering textile circuit boards, integrating sensors, contacting electronical elements as well as for automating manufacturing processes. The latter has shown that a combination of stress tests and functional tests is suited best for examining the reliability of smart textiles. Electronic components in Smart Textiles need to tolerate higher and different workloads compared to their usual environment, while they also can change the characteristics of the textile.

15:00 - 15:15

Discussion/Q&A with Session Chair: Dr. Bernd Hense

13:30 - 15:15

Session 6.2 Software & Systems-Egineering: Languages & Standards: MISRA

13:30 - 14:00

MISRA C/C++ Situation Report Andrew Banks, LDRA Software Technology + MISRA

The MISRA C and C++ Guidelines are adopted across many industries and domains; their recommendations are a vital part of many organisations' implementation, verification and validation activities. But like the languages they support, these Guidelines do not stand still. Intended to introduce the MISRA topic at EW21 and act as a "session Keynote", this paper will provide a Status Report on the activities of the MISRA C and MISRA C++ Working Groups, especially with respect to the incorporation of AUTOSAR C++ and the progress towards new Editions. It will also update on MISRA Compliance, and introduce the first findings of the new MISRA Software Quality Measures (aka Metrics) activity.

14:00 - 14:30

How to Put MISRA and AUTOSAR Coding Compliance Into Practice Dr. Dennis Kengo Oka, Synopsys; Dr. Ralf Huuck, LOGILICA

The journey to autonomous driving requires stringent requirements for safe and secure software development. In the past applying coding standards to smaller in-house developed software was a viable approach; however, today's automotive systems comprises many components including proprietary, commercial, and open-source software. Software compliance is a real challenge, especially with more agile development and shortened delivery timelines. In this talk we discuss common challenges with MISRA and AUTOSAR coding compliance for such large code bases. We propose practical solutions to ensure safety, but also maintain development velocity where possible. We show how static analysis compliance tools, data management and visualizations can assist modern workflows, which automotive organizations can employ to help developers focus and prioritize, as well as engineering management to stay on top of complex challenges. We highlight the benefits and give an outlook to future needs in this space.

14:30 - 15:00

BARR-C:2018 and MISRA C:2012: Synergy Between the Two Most Widely Used C Coding Standards Prof. Dr. Roberto Bagnara, BUGSENG / University of Parma

The Barr Group's Embedded C Coding Standard is, for coding standards used by the embedded system industry, second only in popularity to MISRA C. However, the choice between MISRA C:2012 and BARR-C:2018 needs not be a hard decision since they are complementary in two quite different ways. On the one hand, BARR-C:2018 has no incompatibilities with respect to MISRA C:2012 and, modulo programming style, it defines a subset of C that, while preventing a significant number of programming errors, is larger than the one defined by MISRA C:2012. On the other hand, concerning programming style, whereas MISRA C leaves this to individual organizations, BARR-C:2018 defines a consistent programming style aimed at increased readability. As a result, BARR-C:2018 can be seen as a first, dramatically useful step to C language subsetting that is suitable for all kinds of projects; critical projects can then evolve toward MISRA C:2012 compliance smoothly while maintaining the BARR-C programming style.

15:00 - 15:15

Discussion/Q&A with Session Chair: Andrew Banks

Parallel Sessions

16:15 - 18:00

Session 1.3 Localisation

16:15 - 16:45

Sub-meter Localization Precision Based on Bluetooth Clement Chaduc, Texas Intruments Norway

The need for an accurate, low power, affordable and widely-adopted positioning system is undeniable. Indoor navigation, tools localization, asset tracking, location-based service and passive entry (in a room or a vehicle), are just a few examples of the numerous use-cases benefiting of such technology. Bluetooth based localization has been used for years in the form of beacons using RSSI. However, the accuracy of such techniques has been relatively limited. With the introduction of the direction finding feature, Bluetooth now enables developers to design sub-meter localization applications with reduced cost and power consumption with the use of Angle of Arrival (AoA). Bluetooth AoA uses the phase of the signal to determine the direction of a transmitter and can be done within a connection or enabled via a connectionless approach. In this paper, we will discuss the benefits of the different types of AoA and how engineers can implement and further design with AoA in their systems.

16:45 - 17:15

Smart Proximity Detection and Data Monitoring Using Bluetooth Low Energy Interface Saurabh Rawat, STMicroelectronics; Kumar Rahul Tiwari, STMicroelectronics

The paper presents how effectively social distancing as well as proximity monitoring can be combined together using a wearable, phone and cloud app. BLE based wearable generates alert as well as stores the proximity data when device is 6 feet or lesser for certain duration and it also monitor the person vicinity with the possibly infected people. Device works as a server and support 2 modes. In first mode, non connectable un-directed beacons are advertised. In second mode, device is in scannable and connectable mode advertising beacons to make a GATT connection with Smartphone (client). The paper also shows the way to optimize flash memory by logging data based on the software filters. While the wearable device is in first mode switching is based on external event (button press, sensor trigger, etc). In second mode Smartphone retrieves data over GATT connection and along with cloud server process it to determine and notify the person about the possible vicinity with the infected person.

17:15 - 17:45

Evolution of Location Solutions With Bluetooth LE Srividya Sundar, Texas Instruments

Bluetooth has been a leader in delivering location technology to the market. First with RSSI, simple beacons and tags to deliver meter level accuracy when you need to determine if two devices are near each other, or a simple positioning system. Then Bluetooth added Direction Finding capabilities to deliver centimeter level accuracy, ushering in a next generation of simple to deploy, accurate location solutions. Now, Bluetooth is continuing in this direction by adding secure ranging capabilities to not only determine if an object is near, but how far away. This session will explore the progression and accuracy of Bluetooth location services and discuss the flexibility available to choose and tune your solution depending on the use case and needs of the implementation – from simple positioning systems to secure and highly accurate ranging as necessary for digital keys and high-risk environments.

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Dr. Michael Kuhn

16:15 - 18:00

Session 2.3 Conformance Testing

16:15 - 16:45

A Versatile Measurement and Debug Tool for NFC Interoperability Testing Martin Erb, Graz University of Technology; Martin Troyer, Graz University of Technology

Full interoperability is the key to sustaining the relevance, reliability, and user acceptance of the Near Field Communication technology in our daily lives. The massive amount of NFC-enabled devices and the resulting number of possible applications lead to interoperability issues for NFC products on the market. The measurement and debug equipment for NFC product certification are developed for automated and accurate testing within a specific setup in an isolated manner only. We first define critical NFC parameters causing interoperability issues by investigating test results recorded in laboratory and combine the data with expert know-how from a world-leading NFC device manufacturer. We then design a software-defined radio test system, including intelligent trigger functionality for an external oscilloscope, especially for those NFC applications with a constantly polling reader. We implement the design and show experimentally how it speeds up interoperability testing and debugging.

16:45 - 17:15

5G Industry Automation – What is Required for Conformance Certification? Thami Elidrissi, Bureau Veritas- 7Layers

5G enables different functions and technologies which supports dedicated use cases and applications. In this Presentation we will support you to understand the functionalities and requirements of 5G. • What are the requirements for industrial automation use cases? • What are the requirements for the certification of 5G devices? • conformance requirements as business door opener.

17:15 - 17:45

UWB Reloaded – Test & Certification Based on IEEE802.15.4z Joerg Koepp, Rohde & Schwarz

Ultra-wideband communication, as standardized by IEEE 802.15.4, enables very low power communication and very accurate ranging in the license-exempt spectrum. Based on distinct applications in several industries, the technology is now entering the consumer market, mainly targeting mobile phone and automotive applications. Typical use cases are keyless entries, asset finding, mobile data sharing and secure payment. For the testing of UWB devices besides regulatory requirements, the performance and interoperability aspects and requirements as addressed by the FiRa consortium, the UWB alliance or the Car Connectivity Consortium are of utmost importance. In general, the design, integration and testing of wideband radio devices at very low power require test solutions able to generate and analyze very wide signals and have the required dynamic range. A special aspect is the verification and calibration of the components used for time of flight measurements, requiring a test

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof, Dr. Dirk Pesch

16:15 - 18:00

Session 3.3 OS Virtualization

16:15 - 16:45

Achieving Optimum System Performance With Embedded Virtualization Leo Hendrawan, BlackBerry QNX; Randy Martin, BlackBerry QNX

Deploying virtualization on embedded system is rarely straightforward process due its resource constraints and the reliability requirement it needs to achieve. This presentation describes the practical techniques using real examples on how to configure and tune the hypervisor configuration, especially with the presence of safety requirements, in order to achieve the desired and optimum system performance. The presentation will go through some of the best practices of using common tooling applications for analyzing and tuning the multi guests environment running on top of an embedded hypervisor, by taking the QNX Hypervisor for Safety for example.

16:45 - 17:15

Comparing Methodologies to Improve Security and Reliability of Untrusted Embedded Systems Dr. Carmelo Loiacono, Green Hills Software

Nowadays, commodity Operating Systems (OSs) like Linux and Android are widely used in embedded systems. However, these OSs are large, complex and inevitably contain numerous flaws whereby once compromised, an attacker can violate the security and take control of the whole system. A key method for improving the security of these systems to protect against sophisticated attacks is to use hypervisors that guarantee separation between the system software components. A hypervisor that is designed to be secure and reliable from the ground up can provide multiple levels of privilege so that a service with sensitive data could run in an isolated “compartment”, or partition, alongside a service with less sensitive information. In this session, we discuss the advantages of using a hypervisor on critical embedded systems where Linux or Android is present. We also approach the best way to architect secure systems using a Separation Kernel with native applications.

17:15 - 17:45

Hypervisor or Multicore Framework: Which is Best? Colin Walls, Mentor, a Siemens Business

Multicore embedded systems are becoming increasingly common. The most popular software architecture is Asymmetric MultiProcessing (AMP), where each core runs its own operating system or may have no OS at all. Such systems generally need some overall supervisory software that provides control of boot order and inter-core communication and security. There are broadly two options: a hypervisor or a multicore framework, such as those based on the OpenAMP standard. This session explores the characteristics of these two approaches and outlines their pros and cons, leading to guidance on making the choice.

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Dr. Matthias F. Wagner

16:15 - 18:00

Session 4.3 Safety & Security: Security Processes and Standards

16:15 - 16:45

Passing Cyber Security Evaluation – Tips for Embedded Engineers and Product Managers Juho Vesanen, National Cyber Security Centre, Finnish Transport and Communications Agency

Hackers are increasingly targeting consumer devices, routers and IoT devices. To support consumers, during fall 2019 the Finnish National Cyber Security Centre was the first country to release a cyber security label for consumer IoT products. Aim of this label is to communicate that a product targeted for consumers is tested and found out to be secure against most common threats from the internet. During the first year of technical product testing a lot has been learned. This paper describes from a technical, low-level standpoint how modern IoT devices should designed to ensure security, what are the typical pitfalls that might prevent earning the label and describes the national requirements in a clear and concise way. This paper also highlights the typical hindrances that are experienced by the label granting body and describes the process of obtaining the Finnish cyber security label.

16:45 - 17:15

Hardware Security You Can Touch Mihai Tudosie, Infineon Technologies Austria

In a connected world, always under the pressure of keeping up and staying ahead of increasing hacker capabilities, hardware security seems to be the ultimate ingredient of a really well protected solution. But what exactly is it? The talk will demystify hardware security and introduce basic concepts behind it: asymmetric cryptography, public/private key concept, X509 and related. Then typical applications where hardware security is not only beneficial, but essential will be presented. In the end, a walk through the typical development steps involved when hardware security is considered for a system, will conclude the presentation. Along the presentation, various open source tools are introduced, so that the talk goes beyond a pure theoretical exercise and brings a real practical benefit to the audience.

17:15 - 17:45

Using SESIP to Simplify Security Evaluation and Build Trusted IoT Products Gil Bernabeu, GlobalPlatform

While security guidelines & certification schemes are helping address the IoT security challenge, different 'things' must meet different security requirements & assurances. They do not all require the same certification and it is often not possible, due to their sheer number, to test each one individually. This presentation will introduce the Security Evaluation Standard for IoT Platforms (SESIP) and how: - It defines a standard for trustworthy security assessment of IoT platforms & connected products by: - Uses Common Criteria as a foundation to enable certification stakeholders to reuse the experience they have built on CC products in different end-user devices; - Provides a consistent definition of IoT platforms and enable a fair comparison between evaluated platforms. - Helps IoT vendors select platforms that provide the appropriate level of security and the ability to properly leverage the right security features for their product.

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Andreas Rüst

16:15 - 18:00

Session 5.3 Hardware Power

16:15 - 16:45

Track Keynote: Power Management in Embedded Systems Colin Walls, Mentor, a Siemens Business

The importance of power management in today's embedded designs has been steadily growing as an increasing number of battery powered devices are developed. Often power optimizations are left to the very end of the project cycle, almost as an afterthought. In this paper we will discuss design considerations that should be made when starting a new power sensitive embedded design, which include choosing the hardware with desired capabilities, defining a hardware architecture that will allow software to dynamically control power consumption, defining appropriate power usage profiles, making the appropriate choice of an operating system and drivers, choosing measurable power goals and providing these goals to the software development team to track throughout the development process.

16:45 - 17:15

Circuit and Antenna Design of a Simultaneous Wireless Power Transfer and Near Field Communication System Christian Merz, Würth Elektronik eiSos

In this paper, two alternatives to implement a system, delivering wireless power transfer (WPT) with simultaneous near field communication (NFC), are presented. The first option is to implement a WPT inductive coil alongside an NFC antenna in one single device, such that the WPT coil and the NFC antenna do not impinge on each other during simultaneous operation. This paper describes the design goals, which have to be satisfied considering the range of power levels and distances between the transmitter and receiver devices. This investigation is done by measurement and simulation. Another option to achieve such a system is to switch off the WPT operation and instead to power the target load with a pre-charged super-capacitor, while the NFC continues without interruption. The system design steps to implement this time multiplex procedure are described in detail in this paper. Finally, the advantages and disadvantages of these two alternatives are discussed.

17:15 - 17:45

Meeting the Complex Power Supply Demands of ADAS and Autonomous Driving Functions Sebastian Scholz, Maxim Integrated

17:45 - 18:00

Discussion/Q&A with Session Chair: Dr. Bernd Hense

16:15 - 18:00

Session 6.3 Software & Systems-Engineering: Development Process

16:15 - 16:45

Track Keynote: The Application of Open Source Technologies to Embedded Systems Mike Milinkovich, Eclipse Foundation

As the Internet of Things (IoT) continues its proliferation throughout multiple global industries, one trend that end customers and IoT developers have made abundantly clear is they expect many IoT and embedded technologies and solutions to be open source. This has been confirmed in the latest Eclipse IoT Commercial Adoption survey published in March 2020, which found out that 60% of respondents are factoring open source in their deployment plans. While businesses appreciate the cost savings of the model, what they value about it is the control and flexibility it gives them. This is a significant departure from single-vendor embedded solutions of days past, as today's customers turn towards less expensive, faster-to-innovate and permissionless open source solutions. This presentation will examine the application of open source technologies to embedded systems across a host of industries, from smart manufacturing, automotive, cyber-physical systems and smart cities.

16:45 - 17:15

Embedded Systems Go Mainstream Maarten Koning, Wind River

Embedded devices of all types, sizes and locations are undergoing dramatic change. The software and hardware that provides their general-purpose storage, HMI and internet-related services are being teased apart from the real-time and safety-related subsystems. Once separated out, those functions, along with all the management software that handles system orchestration and configuration are being moved to IT infrastructure that has its roots in server and cloud computing. This change is enabling embedded systems to be packaged, configured and deployed more like general-purpose IT applications than in the past. In this new world, embedded systems are de-constructed to the minimalist execution engine that can provide a real-time or safety service. Those are then deployed onto dedicated hardware partitions taken from a broader pool of hardware and managed by Linux.

17:15 - 17:45

Guidelines and Best Practices for Managing Open Source Software for Embedded Systems Prof. Robert Oshana, NXP Semiconductors

Open source software (OSS) is becoming more ubiquitous in embedded systems. There are many benefits to the use of OSS including flexibility and agility, speed, and community involvement. Drawbacks include compatability issues, difficulty of use, licensing, and hidden costs. However there are a set of best practices for using OSS in the embedded system industry. In this talk we will review some best practices for leveraging OSS, discuss the different licensing options, the tools and techniques to help integrate OSS, properly working with the OSS community including examples of embedded code snippets that can be properly upstreamed, how to leverage the OSS ecosystem, and how to architect an embedded OSS framework within industry software teams based on actual industry examples.

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Dr. Jörg Abke

Day 2 - Tuesday, 02. March 2021

10:15 - 10:55

Keynote 2 Conference Keynote Prof. Dr. Peter Liggesmeyer

Parallel Sessions

11:00 - 12:45

Session 1.4 Software for IoT

11:00 - 11:30

Are High-level Languages and Tools Forbidden Fruit for Embedded Developers? Valter Minute, Toradex

People developing on embedded devices have been traditionally refraining from using high-level languages, tools or frameworks. The motivation was usually that embedded software needs to run on devices that have limited resources and must be reliable, running 24/7 in often unattended environments. Many of those technologies come from the server/cloud world where reliability is also a requirement, but hardware resources are not a limitation. Are hardware resources still such a big a limit today in embedded development? How do a few dollars/Euros saved on a bill of materials compare with days or months of development time? Is it worth using tools that privilege developer's productivity over performances and small footprint? What technologies can work on embedded devices and on what kind of embedded devices? This session won't provide definitive answers to those questions, but I will try to help provide you with ideas about how those things can be evaluated in your next project.

11:30 - 12:00

n-Blocks Studio – Model based Low Code Ssoftware Development for Low Power Embedded Devices Nikolaos Chalikias, Cork Institute of Technology

Embedded software development has evolved over the recent past. Initially it was a complicated undertaking with assembler and limited tools, then C programming. Recently a range of tools supporting alternative software development paradigms have become available using graphical programming methods or domain specific languages. These approaches are all part of model-based software development. We have developed a graphical software tool to allow non-experienced developers to programme embedded microcontroller low power sensor nodes and build applications. The tool leverages a flow-based Inspired programming paradigm in conjunction with software blocks that each implement particular functions of an overall firmware. The domain specific language created by this programming approach is supported by a low-level kernel which runs directly on the microcontroller. We have tested the approach in a number of IoT focused proof of concept projects and found that developers are more productive

12:00 - 12:30

Native Execution of Java for Embedded Market and IoT Dr. Rainer Eschrich, Oracle; Bruno Caballero, Microdoc Computersysteme

Java is the most widely utilized and most popular language in the industry today. Java has also been widely adopted in the embedded market and IoT. However, the design of Java as a runtime language and its implementation has limitations in use cases in which fast startup time, low footprint and low memory consumption are mandatory. GraalVM, initiated in Oracle Labs, is a project that solves these limitations. The GraalVM's compiler, itself written in Java, can be used with Ahead of Time compilation to transform JVM-based applications into native executables, which allows the application to be executed without a virtual machine. Further, the new LLVM backend of GraalVM allows the easy integration in embedded systems. The presentation will demonstrate these unique features of the GraalVM. We will show and demonstrate the benefits of this technology on embedded systems.

12:30 - 12:45

Discussion/Q&A with Session Chair: Ingo Rolle

11:00 - 12:45

Session 2.4 Wired Fieldbus

11:00 - 11:30

Comparative Analysis of CAN, CAN FD and Ethernet for Networked Control Systems Andrea Reindl, OTH Regensburg

Networked control systems e.g., battery management systems or vehicle systems, are control systems consisting of sensors, actuators and controllers with a communication network in the control loop. The data rate and reliability of the underlying communication network are key factors, as delays or losses directly affect the system control. The processor load caused by communication is significant as it influences the calculation of system states and the setting of control parameters. The power consumption of communication affects the energy efficiency of the application. This paper comparatively analyzes the maximum power consumption, the error rate, the transmission time of messages, the processor load and the behavior at high traffic of the communication technologies Controller Area Network (CAN), CAN with Flexible Data-rate (CAN FD) and Ethernet. Ethernet offers a high data rate and payload size, while CAN and CAN FD are predestined for short messages and broadcast communication.

11:30 - 12:00

Ethernet-APL – Ethernet to the Field of Process Plants Benedikt Spielmann, Endress+Hauser Digital Solutions

Process plants are striving for efficient engineering and plant design, fast start-up and commissioning, producing products with increasing efficiency and quality. Digital transformation and a fully connected plant support these objectives. Ethernet technology offers as de-facto standard for wired digital communication and with top performance the basis for the connected plant. In process plants, Ethernet is mainly used at the higher levels of the automation pyramid, hardly at the field level. Traditional technologies like 4-20mA including HART and fieldbus are currently being used in the field level which makes it difficult to get comprehensive data access to the field instruments, especially where high data volume transfer is necessary. So, what are the obstacles to use Ethernet in the field of process plants? What does a solution for integrated network technology look like? This presentation answers these questions and shows how Ethernet technology can be used for the field of process plants with the new advanced physical layer for Ethernet (Ethernet-APL) which meets all requirements of process plant environments.

12:00 - 12:30

Extended communication capabilities for embedded networking Reiner Zitzmann, CAN in Automation (CiA)

In 2017, CiA has published CANopen FD, which reuses a lot of the CANopen functionality. Therefore users of classic CANopen can get very fast familiar with CANopen FD. Additionally, CANopen FD provides new functions, such as the USDO. The USDO communication object provides the full function coverage of the classical SDO. Furthermore the USDO supports dynamic setup of communication channels during system run-time. This is very advantageous for systems that are modified by the end user, who is not necessarily an expert in embedded communication. The USDO provides multicast and broadcast communication. Updating the firmware of the devices during end-of-line production, or providing the configuration to devices with similar application-related tasks, are just two examples, where the new USDO could assist system designers. The presentation will focus on the possibilities of embedded networking, supported by the USDO service, and which kind of application can benefit most.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Andreas Grzemba

11:00 - 12:45

Session 3.4 OS Automotive, Android, AutoSAR

11:00 - 11:30

Progress on the AUTOSAR Adaptive Platform for Intelligent Vehicles Günter Reichart, AUTOSAR

The AUTOSAR community, which has grown strongly, is now developing completely new approaches to meet the challenging market trends in the automotive industry. Internet access in the car or highly automated driving are only a few central topics AUTOSAR is dealing with. The result is an intelligent and flexible infrastructure SW called AUTOSAR Adaptive Platform. The platform aims to provide application developers with a stable programming interface. The platform supports parallel processing, allowing it to be used to support high-bandwidth communication and other fields. The POSIX based operating system allows the use of customer applications during live time. In addition to security functions, AUTOSAR also deals with system compatibility and integration. Since 11/2019, the latest releases have focused on a common methodology for standardizing E/E systems and security issues, such as IPSec or cryptography. AUTOSAR creates automotive use cases with Adaptive and Classic Platform.

11:30 - 12:00

Functional Safety: Software Partitioning and Functionality Assignment for Complex and High Performance Architectures Dr. Ahmed Khan, Siemens Digital Industries Software; Mathias Fritzson, Siemens IES Embedded/AUTOSAR

E/E architecture complexity is increasing and vehicle safety requirements are becoming more stringent with automated driving, electrification and connected vehicle applications. Consumer expectations for premium user experiences, end-user vehicle functionality and the proliferation of automated driving vehicle sensors with in-vehicle components and off-vehicle V2X systems increase demands on the CPU performance. To manage design complexity, meet design constraints for functional safety of automotive E/E systems, achieve IS026262 compliance, and deliver a rich and flexible solution, a highly efficient, integrated software partitioning approach is required. Practical design examples and lessons learned from in-production OEM flagship projects will also be included with a system-level framework for partitioned communication introduced into existing AUTOSAR ECU systems.

12:00 - 12:30

An Introduction to Android Automotive OS Chris Simmonds, 2net

Android Automotive OS is a version of Android tailored for In-Vehicle Infotainment (IVI) â€“ navigation, vehicle status, audio, and more. The first car to use Android Automotive is the Polestar 2. In this presentation I will talk about the changes Google have made to Android to make it ready for the road. There is a a new hardware abstraction layer that allows applications to access the vehicle bus in a controlled way. There are changes to the Android audio subsystem to handle the complexities multiple input and output channels. And, there is a new sub system to handle the rear view cameras. Among other things, I will be asking: how does a car differ from a smartphone? What are the consequences of running a consumer operating system in the IVI head unit? Which parts are open source and which proprietary? Come along to find answers

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Jeronimo Castrillon

11:00 - 12:45

Session 4.4 Safety & Security: Security Processes and Standards

11:00 - 11:30

Implementing the 13 Best Practices for Consumer Electronics Security Haydn Povey, Secure Thingz

EN 3030645 is the European standard for cybersecurity in Consumer Electronics, ensuring that every connected device shipped into the EU meets a defined set of security demands. Unfortunately these Best Practices may create a burden on development engineers, and require additional skills, capabilities and functionality within the application. In this session we will examine the requirements, and focus on how developers can easily and quickly tackle these new requirements, including the development of advanced identity concepts based on cryptographic certificates and keys, the need to address vulnerability disclosure using advanced version management, and the ability to update and remediate systems, even following a successful attack, using integrated patch management.

11:30 - 12:00

Security Risk Assessment Using TARA Nishant Khadria, Deloitte

The content presents an approach to identify assets, determine impacts and analyse cyber security threats to comprehend risk exposure. As a first step, the process shows how the assets to be identified and how various impacts (safety, privacy, financial, operative, reputation etc.) could be derived if an asset is compromised. In the next step, likelihood of an event is ascertained through by analyzing threats based on security goals and threat agents. Finally, various graphical models are discussed to map findings. To demonstrate the methodology, an example would also be mentioned. TARA, Asset analysis, Threat analysis, Risk assessment, Threat agent, Threat vector, Risk heat map, Risk scoring, Safety impact, Privacy impact, Financial impact, Operational impact

12:00 - 12:30

Planning for the Protection of Your Product IP Throughout the Volume Curve Clive Watts, Secure Thingz

Valuable product intellectual property (IP) can be compromised or even stolen at any point along the supply chain. The problem starts in the development lab and extends all the way to mass production and even to product retirement. Every new product should include a strategy for IP protection at every point in its lifecycle, considering what approaches and tools to use along the way.

12:30 - 12:45

Discussion/Q&A with Session Chair: Karlheinz Ronge

11:00 - 12:45

Session 6.4 Software & Systems-Engineering: Development Process

11:00 - 11:30

Software Lifecycle Activity Costs for Secure Embedded Systems Marcus Nissemark, Green Hills Software

Embedded systems need to operate for many years in the field. During the lifetime of the product, there are several lifecycle iterations that need to be considered, especially for safe and secure embedded system. These iterations start already during design and development by choosing the appropriate software architecture components such as a real-time operating system, over the air-update solutions and middleware components. Forming an embedded software architecture that needs to adhere to both functional feature updates as well as security critical patches becomes a critical choice that can have an impact on the lifecycle activities of years to come. This talk will look at some of these activities that can arise over the lifetime of an embedded system and discuss appropriate software architecture approaches that can mitigate some of the costs related to these activities.

11:30 - 12:00

Test Driven Development for Mission Critical Embedded Software Mark Richardson, LDRA

When developing embedded software for mission critical applications, it is important that the software functions correctly in all respects, beyond the functionality specified by the requirements. One efficient way to achieve this is to perform Test Driven Development (TDD). The TDD paradigm requires a set of tests to be created before each function is developed. Next, the function is written as a stub that compiles, but serves no useful purpose. An initial set of tests is then executed, most or all of which will fail. An iterative process then follows such that code is developed to ensure that all tests pass, and new tests are added until the full functionality of the function is in place. The code may then be refactored to make it more efficient, and the tests re-run. This paper will use a detailed example to explore the practicalities of TDD. It will examine the role of coding standards such as MISRA, arguing that the refactoring of code can also be leveraged to make it compliant.

12:00 - 12:30

Adopting Agile Software Development Best Practices for Functionally Safe System Development Shrikant Satyanarayan, LDRA

Pick up a functional safety standard (ISO 26262, DO-178C, IEC 61508, EN 50128, ISO 13849â€¦) and there will likely be a V-model diagram demanding a requirements-first, design-second, development-third approach. Now contrast that with an Agile Manifesto that promotes how individuals and interactions should predominate over processes and tools, and working software over comprehensive documentation. Small wonder that agilists (advocates of agile development) and functional safety experts have been at loggerheads for years! This paper will debate whether systems designed to be functionally safe can adopt an agile development approach. It will discuss whether appropriate transition criteria and V&V practices, supported by agile methodologies with parallels in more traditional development lifecycle models, can combine to ensure a safe system design. And it will suggest how agile development might be adopted for critical systems, without compromising their integrity.

12:30 - 12:45

Discussion/Q&A with Session Chair: Dr. Klaus Grimm

11:00 - 12:45

Session 8.1 Autonomous Engineering: Embedded AI

11:00 - 11:30

Prototyping and Deployment of Deep Neuronal Networks on FPGAs Dimitri Hamidi, The Mathworks

Deep learning on FPGA is playing an increasing role across a growing number of systems and applications due to FPGA's unique attributes of flexibility, high throughput, low latency and per watt performance. Nevertheless the high development effort and the need for extensive hardware knowledge might become a prohibiting factor when targeting deep learning to FPGAs. This paper illustrates a workflow that simplifies the task of design exploration & prototyping of deep neural networks on FPGAs. It enables the user to generate portable HDL code for a customizable deep learning processor. We describe it's architecture in details and show how the processor can be quickly deployed for deep learning inference on supported FPGA boards. Based on the profiling data provided, the user can tune the performance to meet his system constraints. Apart from redesigning the networks, the performance can further be optimized via INT8 quantization and by trading off hardware resource usage with latency

11:30 - 12:00

Democratizing Machine Learning for Embedded Developers Alessandro Grande, Arm

Turning a tinyML example into a product doesn’t have to be complex. In recent years, the intersection between traditional embedded development with the new world of ML has enabled the proliferation of a new class of intelligent IoT endpoints - devices based on microcontrollers with machine learning capabilities that consume very little power, in the range of milliwatts. Arm and Arduino have focussed a lot of efforts on developing hardware, tools and open-source libraries to make it easier to deploy a machine learning model to a microcontroller. Join this step-by-step presentation with Arduino and Arm to learn how as an embedded developer you can go from a simple tinyML prototype to production with the right hardware, open-source libraries and ML enabled professional tools.

12:00 - 12:30

Change Your Mindset: Embedded Machine Learning for Predictive Maintenance David Henry, Arm; François de Rochebouët, Cartesiam

Mindset Change 1. Think of ML as a way to program using examples and not as a feature. Mindset Change 2. Think of ML as something that can run on ultra-constrained power efficient devices, not just in the cloud or on high performance devices. Mindset Change 3. Think of ML as something that can be programmed by embedded engineers, not just data scientists. In this talk, we will go through three of the biggest misconceptions about embedded machine learning and teach the audience to think differently about these areas and what is possible. We will walk the audience through the tools and software needed to infer and predict at the endpoint, directly inside a constrained microcontroller, proving you don't need to be a machine learning expert to deliver ML. Authors: David Henry: Senior Product Manager at Arm François de Rochebouët: Co-founder and head of R&D at Cartesiam

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Alexander Biedermann

Parallel Sessions

13:30 - 15:15

Session 1.5 Software for IoT

13:30 - 14:00

Combine C++ and Java Into a Single ARM Executable Using GraalVM Vojin Jovanovic, Oracle

The presentation will start with explaining all the power the Java ecosystem has. Then I will introduce GraalVM Native Image and how it can interop wtih C/C++. I will finish by a demo that demostrates how you can use Java libraries from C++ (e.g., NLP libraries).

14:00 - 14:30

Cloud Driven CI/CD for Embedded Linux Richard Elberger, Amazon Web Services

Building a Linux distribution requires significant compute and storage. Delivering solutions with Embedded Linux is no different and requires more savvy since solution providers, many times, must provide firmware updates instead of package manager-driven updates to improve security, resiliency, and application capability. By creating a Continuous Integration (CI) and Continuous Delivery (CD) pipeline for Embedded Linux based IoT solutions you improve quality, consistency, and time to market. In this session, you will learn the core components and events for Embedded Linux CI/CD that cleanly transitions to post-release events such as Over-the-Air Firmware updates, mechanisms for Embedded Linux flavored Continuous Delivery and Continuous Integration, and the mechanics for securely providing automated firmware updates as a result of these processes.

14:30 - 15:00

Lightweight Tooling to develop lightweight Systems – advance your IoT Solution by web-based Modeling and Code Generation Marcus Munzert, Generative Software; Dr. Christoph Rathfelder, Hahn-Schickard

In the domain of IoT, the systems themselves and the development of firmware for embedded systems is becoming increasingly complex and extensive. It includes tasks like access to peripheral communication interfaces and modules, data processing logic, but also the addressing of sensors and actuators connected via interfaces like UART, I2C or SPI. Development tools are trying to support developers by choosing the right configuration settings and code libraries. The creative work, to come up with a good solution that fulfills certain requirements, still needs to be done by a human being. Even this work has some recurring activities or relatively identical code areas. This is where the GenoSens tool, developed in a research project, can help. It supports developers in these recurring tasks by applying model-driven techniques. Developers shape their solution by focusing on the decomposition of big tasks into smaller ones. Due to the modular structure of the modeling tool, the DSLs and the generators, the tool is flexible in its application and at the same time easily extendable in all areas. For example, manufacturers can bring in their own extensions or developers can add functionality to the standard generators. In the presentation we will jointly demonstrate the results of the research project. Besides the demo of the tool, we will also discuss the experiences from the development in the field of applying model-driven technology in the development of embedded systems.

15:00 - 15:15

Discussion/Q&A with Session Chair: Manuel Schappacher

13:30 - 15:15

Session 2.5 Bluetooth

13:30 - 14:00

Optimizing Bluetooth Low Energy for Energy Efficiency Clement Chaduc, Texas Intruments Norway

With billions of connected, always-on devices and projects of further growth of this number, the communication industry is expected to consume 20% of the world's electricity by 2025, energy efficiency is a necessity for the long-term sustainability of the Internet of Things (IoT). Bluetooth Low Energy has been designed with these considerations in mind. However, usage of Bluetooth Low Energy does not automatically guarantee power efficiency, and each new version of the Bluetooth specification brings new ways to save power and increase performance. In order to make more efficient systems, it's best to look at finding ways to decrease the usage of the radio without compromising on the requirements of the system. In this paper, we will discuss the various ways engineers can further utilize and optimize their applications leveraging various features of Bluetooth Low Energy like the various PHYs, optimization of scanning and advertising parameters, connection parameters, and more.

14:00 - 14:30

Reliable Industrial Communication Using Bluetooth Technology Pelle Svensson, ublox

Bluetooth technology was primarily invented for use in consumer applications like laptops, phones, headsets. Right at its birth in 1998, ABB Corporate Research evaluated Bluetooth radios in industrial environments and found unexpectedly good results, triggering industrial device manufacturers to slowly begin implementing Bluetooth technology. First applications involved replacing laptop serial cables for non-time-critical use cases. By 2005, Bluetooth technology had found its way into control applications, benefiting from its reliability and low latency. This presentation will examine why Bluetooth works well in industrial applications and use cases, with a focus on reliability and low latency. It will also look at the latest core specification, Bluetooth 5.2, and the added features it brings to reliable industrial use cases.

14:30 - 15:00

Bluetooth Mesh – Lessons Learned and Notes from the Field Szymon Slupik, Silvair

Bluetooth mesh has been around for several years now. It has proven to be a very successful technology, paving the way to many high profile projects. During this session the new updates from Bluetooth SIG will be discussed, followed by project case studies, with highlights on the challenges faced, the solutions applied and lessons learned.

15:00 - 15:15

Discussion/Q&A with Session Chair: Prof. Dr. Dirk Pesch

13:30 - 15:15

Session 3.5 OS Open Source

13:30 - 14:00

What Differs the Android Open Source Project from Other Linux Distributions? Sergio Prado, Embedded Labworks

Have you ever wondered what is running inside your Android device? Well, you know that you have a version of the Linux kernel there. But what about user-space? It is really a "different beast". If you log into an Android device, you won't find directories like /usr and /lib, or common init systems like systemd or sysvinit. X11, Wayland, dbus, glibc, the Android Open Source Project doesn't use any of that. For several reasons, Google decided to take the project in a different direction. What is the reason behind using bionic over glibc/uclibc/musl? Or Binder instead of D-Bus? In this presentation, let's have a deep look at the AOSP from the inside out and understand how this Linux based operating system really works.

14:00 - 14:30

Formally Verifying the FreeRTOS IPC Mechanism Nathan Chong, Amazon Web Services

The FreeRTOS kernel is a real-time operating system for microcontrollers and small microprocessors. The kernel provides interprocess communication (IPC) to enable applications to be flexibly split over multiple communicating tasks. The main IPC mechanism in FreeRTOS is a concurrent queue: a FIFO data structure that tasks can use to send and receive messages. As a fundamental building block for larger applications, the correctness of the queue is vital. We report on the formal verification of the memory safety, thread safety and functional correctness of the queue using deductive verification. Our proofs are publicly available and give machine-checkable guarantees of correctness that would be infeasible through testing alone.

14:30 - 15:00

Innovation in the Fast Lane: Disrupting Automotive Software Development Through Open Source Dan Cauchy, The Linux Foundation, Automotive Grade Linux

As smartphone technology disrupted the mobile industry at the turn of the twenty-first century, consumers started demanding the same app based experience in their car that they have on their mobile devices. The complexity of software in cars exploded, and automakers couldn't keep pace with consumer electronics due to a dependence on closed, proprietary software coupled with long production and development cycles. Over the past several years, automakers including Toyota, Subaru, and Daimler, have started to close the gap by shifting from closed development processes to rapid development through open source software and Automotive Grade Linux (AGL). Learn how more than 150 AGL members are working together to develop a shared software platform for all in-vehicle applications from infotainment to autonomous driving. Sharing a single software platform across the industry decreases development times so OEMs and suppliers can focus on rapid innovation and bringing products to market faster.

15:00 - 15:15

Discussion/Q&A with Session Chair: Matthias Müller

13:30 - 15:15

Session 4.5 Safety & Security: Safety Architectures

13:30 - 14:00

Applying Automated Formal CCC Checks for Complex Systems Development Wolfgang Meincke, BTC Embedded Systems

Today many systems have safety-critical aspects with an increasing demand for “quality” which can only be addressed by applying mature processes, methods, tools. Having a set of consistent and complete and correct requirements as a starting point for the complex development process is a crucial thing to reach the needed level of quality as prescribed by several safety standards of the automotive and aviation sector like ISO 26262 and DO-178C. In this presentation, we propose an intuitive and graphical specification language to ease the complex formalization task for textual requirements. We then elaborate on fully automated formal checks to demonstrate consistency and completeness and correctness of formal specifications in a very early design stage, where a system model or production code are not yet available. Detected problems are analyzed with a formal requirements simulation feature. This in turn leads to greater product quality with less cost compared with traditional processes.

14:00 - 14:30

Designing Safety In by Extending System Modeling Languages Dr. Juha-Pekka Tolvanen, MetaCase

To create safe systems, systems development should follow applicable safety standards. Nowadays much systems development uses modeling languages, yet most of these languages do not recognize safety concerns at all. We present an approach in which relevant safety aspects are treated as first-class citizens: The modeling language includes concepts specifically for safety, in addition to those for other aspects of system design. We present how an automotive safety standard, ISO 26262, has been added to a modeling language, extending its metamodel and related tool support enabling natural modeling of safety aspects, collaborative development and safety reporting along failure analysis. The extended modeling support shows the key benefits of addressing safety together with system design: Traceability between safety and system design enables collaboration between system engineers and safety engineers, and replacement of error-prone and time consuming manual phases with automated analysis.

14:30 - 15:00

How to Bulletproof Systems Built With C++ Martin Woodhall, LDRA

C++ is commonplace across industries and platforms, from web apps to safety critical embedded applications. It is a language that developers want to use, resulting in a huge talent pool from which to recruit - an important factor when compared to the likes of C and Ada which might otherwise look a better option when reaching for the most demanding levels of criticality. But no-one would want to compromise safety on that basis. This paper will review C++ as a candidate language for the most critical systems as described by functional safety standards such as ISO 26262 & EN 50128. It will consider the pitfalls of using such a complex language, and the advantages of limiting permissible features to a safe subset. It will reflect on the role of object code verification in ensuring that the code will actually do what its developers intended. And it will critically assess the suitability of verification techniques long established for C, in the object oriented world of C+

15:00 - 15:15

Discussion/Q&A with Session Chair: Karlheinz Ronge

13:30 - 15:15

Session 6.5 Software & Systems-Engineering: Measures & Metrics

13:30 - 14:00

How to SQuaRE the Circle of Software Quality Measures Andrew Banks, LDRA

Software metrics are viewed with mixed feelings by many - so much so that they’ve even been renamed as “software quality measures”! But whatever the name, they remain an essential view point within software development. The Software Quality and Requirements Engineering (or SQuaRE) family, standardized as the ISO/IEC 250xx series, provides a specification for quality requirements and appropriate quality characteristics. This paper will discuss the SQuaRE family, its place in the software development lifecycle, and how to make sense of the array of measures. Then focusing on the maintenance characteristic, it will discuss what makes a good measure and highlights the pitfalls of adopting thresholds and applying them blindly.

14:00 - 14:30

Mature Enough? A Maturity Model for Model Based Systems Engineering Dr. Henning Femmer, Qualicen

Many companies try to get the increasing complexity of their products under control by using model-based approaches. However, their introduction is a major challenge that should not be done in one fell swoop. In this paper we present a maturity model that is specifically tailored to the introduction of Model-based Systems Engineering (MBSE). The model defines a set of capabilities that can be achieved through the use of models. These capabilities address the areas relevant for RE: context modeling, scoping, goal and scenario modeling, and requirements modeling. Other model capabilities address the relationship to functional design and architecture. On the basis of this model, it is evaluated where a company stands in the introduction of MBSE and in which areas it is worthwhile to promote model basing. The model takes into account the goals and circumstances of the company and suggests the next steps to be taken.

14:30 - 15:00

Embedded Software Development to Manage the Complexities of Today's Automotive Distributed Systems Brendan Morris, Siemens Digital Industries Software

Embedded software development in the Automotive industry has dramatically increased in it's complexity, multiple new customer features, built from more integrated functions, distributed across multiple ECU's. To manage these demands, new methods, tools and technologies are essential. Until recently the software was usually hand-coded C, developed individually for each ECU. There are now more powerful ECU's, often controlling whole Domains of the vehicle, including a mixture of software types, with C++ often the base and more and more functionality delivered by Application type software. Siemens Digital Industries Software Xcelerator portfolio includes the Capital solution, developed to support challenges discussed, with advanced features to assist in developing these complex systems, considering the variant complexity and linkage to PLM/ALM/CAD etc to provide a complete digital twin.

15:00 - 15:15

Discussion/Q&A with Session Chair: Andrew Banks

13:30 - 15:15

Session 8.2 Autonomous Engineering: Embedded AI

13:30 - 14:00

TinyML for AI at the Very, Very Edge Rajeev Muralidhar, Amazon Web Services; Prasad Vyawahare, Amazon Web Services

Recent advances in ultra-low power hardware architectures, semiconductor process technologies, and artificial intelligence (AI) algorithms have enabled TinyML – a new class of machine learning (ML) on tiny microcontrollers. TinyML has enabled important use cases such as predictive maintenance, anomaly detection, and ultra-low power audio or video recognition on devices in the sub-10mW power envelope. In this paper, we will look at the TinyML framework, its architecture, and provide a demonstration of how we can build low power audio deep neural networks (DNNs) and video convolutional neural networks (CNNs) using TensorflowLite on FreeRTOS-based microcontrollers. We will then discuss challenges and opportunities that will be crucial for this technology to be scalable and deployable in real-world scenarios, including power and performance evaluation tools, and real-world benchmarking methodologies.

14:00 - 14:30

Greater AI Visibility in Embedded Software Dr. James Hui, Wind River

There are growing demands to incorporate AI into embedded software in order to create smarter edge devices, where often data is rich, but processing resources are limited. Care must be taken when designing these AI implementations, and design engineers will need to justify how these intelligent algorithms arrive at a particular decision based on a given set of input data. In this talk, we will share our experience by using simulation and simple Python code to gain insight by 1) manipulating input feature sets to explain how a model makes decisions; 2) reduce the complexity of the model in order to make it easier understandable. These techniques not only improve the debug process and improve model performance, it will also help others understand models' behavior. More importantly, it is an essential step to design a truly dependable system which builds trust with end users, it helps end users to solve real-life problems at the right place and in the right time.

14:30 - 15:00

Machine Learning at the Edge: From Transfer Learning to Inferencing Markus Levy, NXP Semiconductors; Natraj Ekambaram, NXP Semiconductors

This presentation will go through the many steps involved in developing an application that includes machine learning. We'll begin with the data collection and training process through transfer learning. Then we'll describe the process of optimizing the model, specifically utilizing quantization techniques. From there we'll elaborate on selection of an inference engine or runtime, based on multiple parameters as well as the target platform. Once the inference runtime is selected, we'll describe how to run the model, integrating the camera front end and reacting back end. Specifically, we'll also describe how these techniques apply to a vision-based system performing gesture recognition, a function which has become particularly interesting in these times of COVID-19.

15:00 - 15:15

Discussion/Q&A with Session Chair: Dr. Amjad Mohsen

Parallel Sessions

16:15 - 18:00

Session 1.6 Data Management

16:15 - 16:45

The Evolution from IoT to IoE With the Help of Blockchain and the Example "Smart Data Lake" Marc Hamperl, infoteam Software

There is no real "Internet" of Things - rather, the IoT we know today is a highly segmented network of manufacturer-specific intranets that can communicate with the Internet, but rarely with each other. If we look at the degree of networking between devices, people, processes and the internet, we can see that interoperability depends heavily on how much potential actors know and trust each other and can rely on their already established ways of cooperation. Blockchain technology can be used to strengthen trust between new partners, because its characteristics provide technical solutions to organizational obstacles. Thus, it can position itself as the backbone of an Internet of Things which deserves the name "Internet". The presentation takes a look at a possible blockchain-based platform which can be a driving force in this transformation, where data from truly decentralized sources can be brought together in a "Smart Data Lake" - a breeding ground for new synergies and value chains.

16:45 - 17:15

Deterministic Database Management in Mission-Critical Applications Andrei Gorine, McObject

Mission- and safety-critical systems software designs embody key characteristics for which temporal correctness is essential. Deterministic, predictable, fully controllable software components that complement real-time operating systems offerings are in demand. The evolution of data management in aerospace, railroad, process control, and autonomous systems has driven the use of off-the-shelf database systems. It is commonly believed that meeting timing requirements is a matter of sufficiently increasing system throughput. However, research and industry projects have often brought forward temporal aspects and timing constraints for database transactions. We will discuss the objectives of deterministic, predictable database management in real-time systems, and how extensions to DBMS transaction schedulers can add semantics and enforce transaction priorities and deadline scheduling. We will then focus on the practical aspects of the design and demonstrate its use in application patterns.

17:15 - 17:45

Data Streams, MQTT and No-code Apps on the Edge, in the Cloud and In-between Philipp Struß, Cedalo

MQTT is widely used as the standard communication protocol for the Internet of Things (IoT). MQTT makes it possible to establish reliable, scalable connections between devices and applications on the edge and to the clouds. This session presents how MQTT brokers are used as the communication core of many industrial IoT applications. MQTT brokers establish the communication of devices on the edge and ensure the reliable and secure communication of their data streams to the cloud and other systems on-premises. Together with flexible no-code applications, it is even possible that process owners create specific solutions for these data streams.

17:45 - 18:00

Discussion/Q&A with Session Chair: Manuel Schappacher

16:15 - 18:00

Session 2.6 TSN

16:15 - 16:45

TSN With Linux – The Challenges Ahead Kurt Kanzenbach, Linutronix

The Time Sensitive Networking (TSN) extensions provide real-time capable and deterministic communication for regular Ethernet. Not only does the network has to be deterministic, the end-stations have to act deterministic as well. Due to its popularity in the embedded field these end-devices are often driven by Linux in combination with the PREEMPT_RT patch. Within the past years lots of TSN functionality and mechanisms have been developed and implemented in the Linux ecosystem. TSN consists of three basis components: Time synchronization, traffic scheduling and network configuration. In this contribution we will present what the current challenges in each field are and how the discussions and possible solutions are evolving.

16:45 - 17:15

Time Synchronization over IEEE 802.11 Kamil Alkhouri, Hochschule Offenburg

17:15 - 17:45

Time Sensitive Networking Over 5G and WiFi for Industrial Dr. Dave Cavalcanti, Intel; Anil Keshavamurthy, Intel

Recent advances in IEEE 802.11 and 5G wireless technologies in providing low latency and high reliability have brought about new opportunities to “un-wire” many time-sensitive applications and systems. Wireless connectivity is beneficial to many market segments (industrial control, mobile robotics, AR/VR, …) for many obvious reasons, including flexibility and mobility. Given the stochastic nature of wireless communications, achieving determinism like in wired (Ethernet) Time-Sensitive Networking (TSN) systems is challenging. There are also standards and interoperability challenges to enable the practical integration of wired and wireless TSN technologies in real products. There has been growing interest in 5G and TSN, especially given the expectations from 5G URLLC (Ultra-Reliable Low Latency Communications) capabilities.

17:45 - 18:00

Discussion/Q&A with Session Chair: Matthias Müller

16:15 - 18:00

Session 3.6 OS ROS

16:15 - 16:45

Redundant Computer Vision for Fault-Tolerant Autonomous Driving in C++ and ROS2 Prof. Dr. Frank Tränkle, Hochschule Heilbronn

Driverless autonomous driving systems must fulfill safety-related availability goals in addition to safety integrity goals. Safety integrity and fail-passive modes as known in driver assistance systems are not sufficient since the driver is missing for backup operation. System availability must be sustained by tolerating critical system faults through redundancy. This contribution presents a 1oo2D architecture with two redundant cameras and computing channels implemented on Linux RT PREEMPT and ROS2 that achieves safety-related availability goals for autonomous driving. This architecture is realized as part of Mini-Auto-Drive (https://asert.hs-heilbronn.de/) which is a mini plant running up to 8 driverless cars in the 1:24 scale. For fault detection based on self- and cross-supervision, the C++ safety framework MBSAFE is developed and applied. Test results including fault reaction time measurements including real-time failover from the nominal to the backup channel are presented.

16:45 - 17:15

Design and Deployment of Automated Parking Valet on ROS and ROS2 Networks Shashank Sharma, MathWorks

With an increase in the number of actuators and sensors employed in todayâ€™s autonomous systems, complex algorithms are required to program and control them. These algorithms are often distributed across multiple networked components. Robot operated system (ROS and ROS 2) provides a way to connect a network of robot algorithms, simulators, and hardware. This work takes an autonomous parking valet application and its deployment among various nodes in a ROS as well as ROS2 network as standalone nodes. In the first part, we show how to construct a reference automated parking valet system. In the second part, we discuss the deployment strategies of our application on ROS networks as well as ROS2 network.

17:15 - 17:45

ISO 26262 Certification of ROS 2 Dr. Dejan Pangercic, Apex.AI; Mehul Sagar, Apex.ai

ROS 2, a successor of ROS, is a robotics framework suitable for programming of robotic, autonomous driving and other applications where distributed computing, large sensor data throughputs and multiple actuators are part of the system. ROS 2 is written in modern C++ 14 and is open source. In this talk we will for the first time ever present how such a framework has been certified according to ISO 26262, up to ASIL D, SEooC. We will present the following main challenges and how they were solved: - How to retroactively derive the functional and safety requirements and trace them - How to perform the safety analysis (FMEA) - How to detect and eliminate the system memory allocation and blocking calls - How to perform MC/DC code coverage in C++ 14 - How we selected the target hardware and the RTOS platform - How we performed the tool qualification and classification the non automotive tools We will conclude the talk with the analysis of the effort invested into this project.m

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Dr. Thomas Fischer

16:15 - 18:00

Session 4.6 Safety & Security: Safety Architectures

16:15 - 16:45

Track Keynote: Taming Timing – Combining Static Analysis With Non-intrusive Tracing to Compute WCET Bounds on Multicore Processors Dr. Daniel Kästner, AbsInt Angewandte Informatik

For safety-relevant real-time applications, worst-case execution time (WCET) bounds have to be determined in order to demonstrate deadline adherence. For timing predictable microprocessors, worst-case execution time guarantees can be computed by static WCET analysis. Hybrid WCET analysis is a solution for covering effects from accesses to interference channels of multicore processors. We present a hybrid method that combines static analysis with non-intrusive instruction-level tracing to automatically compute WCET bounds - including interference effects. This article gives a brief overview of static WCET analysis and introduces the concept of non-intrusive hybrid WCET analysis, using the Infineon AURIX as a reference architecture. A particular focus is on an integrated solution for hybrid WCET analysis which can request program flow trace information for the code snippets under analysis directly from the emulation hardware. Experimental results on industry-relevant code are reported.

16:45 - 17:15

Control-Flow Evaluation on Multicore Controllers Using Real-Time Trace Information Stephan Radke, Hochschule Darmstadt University of Applied Sciences

Safety critical systems require evaluation of the control flow behavior to ensure the consistency of a design. Control flows in the automotive sector are often realized with a model-driven designed sequence of so called Runnables that are executed in a Runtime Environment (RTE). To ensure that the expected data flow is consistent with the design, the final system needs to be evaluated. This aspect becomes more significant on projects that run on multicore systems. For real-time investigation of the Runnable sequences a possibility to capture time and event information of a running target is required. Although existing tools provide good visualization of e.g. OS events and calls, solutions for multicore systems allowing an easy analysis of the control flow on RTE level are not available. In this paper we will introduce a method for capturing and evaluating real-time trace data of Runnables on an Infineon TriCore AURIX and explain how misconfigurations can be detected.

17:15 - 17:45

Statically Safer Polymorphism With C11 Generics Alex Gilding, Perforce Software

C11 and C99 introduced language features that make writing generic code easier by encodingand taking advantage of type information local to expression structure. These features enable the static dispatch of operations and binding of iteration over dynamic typed structures, like variadic/heterogeneous collections, which are traditionally handled by erasing type information and relying on runtime checking and manual tagging. By simplifying the complexity of the checks needed to ensure integrity, error surface is reduced and analyzability improved. When types need to be erased, generic code can statically check they are consistent first. We show examples of making generic operations statically type-safe byconverting dynamic to static constructs, externalizing iteration, and boxing arguments. This generalizes externalization and statically-typed inversion of control for abstract algorithms. We also show how C can provide type checking for erased types and even for reused memorybuffers.

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Dr. Jeronimo Castrillon

16:15 - 18:00

Session 6.6 Software & Systems-Engineering: Requirements Engineering

16:15 - 16:45

Requirement Verification and 360 Degree Traceability Shrikant Satyanarayan, LDRA

All projects suffer from requirements related defects, including incomplete requirements decomposition, definitions, and management. But issues relating to requirements traceability seem especially susceptible to becoming compounded as development teams grow. Functional safety standards including DO-178C, IEC 61508, ISO 26262, and IEC 62304 insist that bidirectional (or 360 degree) traceability is evidenced, to demonstrate that all intended functionality is in place, and to show that there is no hidden functionality. This paper will explore the implications of 360 degree traceability. It will discuss the challenge of providing evidence of relationships between requirements, code, static and dynamic analyses and tests. And it will describe how by automating traceability between those evidential artefacts, the entire software development cycle becomes traceable, making it easy for teams to identify problems and implement solutions faster and more cost effectively.

16:45 - 17:15

A Rigorous but Practical Specification Technique for Embedded Systems Prof. Robert Oshana, NXP Semiconductors

Embedded systems are cause and effect systems. A set of stimuli into the embedded system produces a response that must be verified to be correct for every possible combination of input sequences. A rigorous specification of this stimuli/response relationship can reduce risk by exposing otherwise tacit information. We can develop a more mathematically sound specification from the behavioral requirements of the embedded system in a systematic manner through a process called sequence enumeration. This practical, easy to use process results in a specification of external system behavior that is complete and consistent. This session will review the techniques of sequence specification and abstraction, state space exploration and state machine generation for embedded systems development.

17:15 - 17:45

How COVID-19 has Changed the Requirements Engineering Process Among Embedded Companies Micaël Martins, Visure Solutions

COVID-19 affected people and businesses all over the world in ways we were not even imagining last year. Certain paradigms will shift for the rest of our lives. Some companies have found it hard to transition to a Work-From-Home-friendly environment. In a matter of one week, companies had to move to remote working, and this had a huge impact on the Requirements Engineering process for many companies. How to successfully brainstorm, elicit, manage and trace requirements, avoid common pitfalls remotely for teams accustomed to work in classic office environments? Many companies fortunately found ways to quickly adapt their processes, some by learning from the experience of some other teams (especially from the United States), and used collaboration and discussions techniques, role-based accesses and information sharing to overcome these challenges. The presentation will show several methods Visure customers and other companies found for this purpose.

17:45 - 18:00

Discussion/Q&A with Session Chair: Andrew Banks

16:15 - 18:00

Session 8.3 Autonomous Engineering: Embedded AI

16:15 - 16:45

Understanding Artificial Intelligence: Explainable AI with Interpretable KPI Labels Dr. Rudolf Felix, PSI FLS Fuzzy Logik & Neuro Systeme

While people will increasingly have to rely on automated AI-systems, the complexity of AI-based systems is constantly increasing and with it the risk of Black Box systems being created. Thus, the need for transparency is growing. Explainable AI (XAI) is an approach in which the activities or decisions of artificial intelligence are easily comprehensible to humans. This automatically leads to the reproducibility of decisions, for example, or makes it easier to identify errors and deviations in the data that could or may have led to incorrect decisions. In his lecture, Dr. Felix presents the mechanisms, opportunities and limitations of XAI. Using the example of qualitative labeling – an AI method that combines decision and optimization algorithms with machine learning – he shows the possible effects of XAI. In this particular case, a new KPI-related view emerges of the results generated by the AI system, which helps to understand the behavior of the supposed AI Black Box.

16:45 - 17:15

Software Driven SoC Architectural Exploration for AI and ML Accelerators With RISC-V Simon Davidmann, Imperas Software

SoC developers and system designers are looking at hardware acceleration options for AI and Machine Learning applications moving from cloud-based algorithms to dedicated hardware. Since the algorithms are already configured for multicore support the tradeoffs become focused on the structure of processor arrays and the optimum performance requirements at each node. In addition to the flexibility offered by the open standard ISA of RISC-V to configure the core features to match the compute requirement, RISC-V offers the options to add custom extensions and instructions that allows a greater degree of system optimization. New extensions can be targeted at the application workload or as dedicated communication channels between the cores, nodes and/or interfaces to the NoC. This talk covers a methodology to evaluate the hardware options by enabling early system architectural exploration using software to uncover the optimum design configurations.

17:15 - 17:45

Quantizing Edge Neural Networks With Qkeras Russell Klein, Mentor, A Siemens Business

Inferencing for Convolutional Neural Networks (CNNs) is notoriously compute intensive. This makes them an idea candidate for hardware acceleration, which is faster and more power efficient than running software on general purpose CPUs. Training and inferencing are typically done using floating point representations of the features, weights, and biases. Using a fixed point representation reduces the size and power of the operators in the accelerator. With a purpose built accelerator, the size of fixed point operators can be anything - they are not limited to 8 or 16 bits. Qkeras, or quantized Keras, is a library built on Tensorflow that allows developers to specify quantized fixed-point operations for each layer. It enables training and inferencing with reduced precision representations. This session will describe how to use Qkeras and High-Level Synthesis to produce a bespoke quantized CNN accelerator, and compares the accuracy, power, performance, and area of different quantizations.

17:45 - 18:00

Discussion/Q&A with Session Chair: Farhad Mafie

Day 3 - Wednesday, 03. March 2021

10:15 - 10:55

Keynote 3 Conference Keynote Paul Gray

Parallel Sessions

11:00 - 12:45

Session 1.7 OTA Firmware Updates

11:00 - 11:30

New Approach to the Over-The-Air Updates for Connected Devices Sergey Lyubka, Cesanta

Over-The-Air (OTA) updates are crucial for connected products, for 2 most important reasons: - rolling out updates and fixes for the product's firmware - rolling out latest security updates and protect the company and customers from compromise Implementing OTA is hard. There are many things that can go wrong and leave devices bricked and unfunctional. There are many different strategies that can be employed, with different level of reliability and security. Here, we provide an overview of such strategies, and offer a novel solution that provides both hardware and remote device management.

11:30 - 12:00

Ktwo: Orchestrator Based Firmware Distribution Mechanism Taimor Imtiaz, Intel Deutschland

Leveraging orchestrators have become a standard in the IT industry. Orchestrators provide the benefit of flexibility and agility while standardizing on interfaces. This paper explores how the same advantages (Gitops, CI/CD, scale, monitoring) that software developers enjoy through orchestrators can be brought into the world of firmware and PLCs. The paper explores how the orchestrator can be used to abstract firmware through equivalent targets (akin to digital twins) and distribute firmware builds across the whole infrastructure through standard mechanisms built into the Kubernetes orchestrator. The paper discusses how IDEs (running on any developer's machine) can be connected securely to a Kubernetes cluster to provide seamless access to the devices on the factory floor without compromising security and reliability of the overall system. Finally, the paper discusses how this system can be extended by system integrators to provide vendor-specific features.

12:00 - 12:30

Why Firmware Update Over the Air (FOTA) is an Essential Part of Scaling IoT Andrew Powers, Arm

A key part of any successful IoT deployment is being able to update the firmware in deployed devices in a reliable, secure and repeatable way. This session will examine the end to end requirements that a FOTA solution must meet covering fundamentals like security, provisioning, device side hardware and software requirements and will examine why mass market adoption of FOTA has been slower than anticipated. This presentation will cover: -The security requirements a FOTA solution must address -Hardware and software challenges that FOTA needs to address -The issues facing developers in implementing a FOTA solution -How a successful FOTA solution can extend the life of a device once its deployed

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Andreas Rüst

11:00 - 12:45

Session 2.7 Wired Fieldbus

11:00 - 11:30

Securing Bridges in CAN/CANopen (FD) Systems Olaf Pfeiffer, Embedded Systems Academy

11:30 - 12:00

Enabling Seamless Cryptographic Rekeying in Industrial Real-Time Communication Systems Heiko Bühler, Hochschule Offenburg

12:00 - 12:30

CAN FD Light Yao Yao, CAN in Automation

CiA has established a Special Interest Group (SIG) to develop a so-called CAN FD light “master/slave” data link layer protocol based on CAN FD. It is intended for use in deeply embedded networks for price-sensitive sensor/actuator networks such as in-vehicle networks smart lighting systems and other I/O-intensive sub-systems. For example a typical modern LED lamps in passenger cars includes a large number of LEDs. The implementation of the CAN FD Light slave nodes is simplified, because there is no arbitration needed and they only react on the master requests. The bit rate is not switched and set to a fixed value, e.g. 1 Mbit/s, which is enough for such applications. The master node implements the CAN FD protocol and has always the communication initiative. The slave nodes transmit only CAN FD Base frames (FBFF) on request.They do not support error and overload frames. The audiences will learn the features of this so-to-say a subset of the CAN FD light data link layer functionality.

12:30 - 12:45

Discussion/Q&A with Session Chair: Reiner Zitzmann

11:00 - 12:45

Session 4.7 Safety & Security: Safe AI

11:00 - 11:30

Standards About AI in Systems with Reference to Functional Safety Frank Poignée, infoteam Software

Several activities are ongoing to give developers, architects etc. some better guidance and arguments on using AI in Systems with reference to Functional Safety. Some overview and some more detailed information about the VDE-AR-E 2842-61: Development and trustworthiness of autonomous/cognitive systems, which is today on of the very few to give some guidance on how to complete the task.

11:30 - 12:00

Trustworthy AI-based Systems With VDE-AR-E 2842-61 Henrik J. Putzer, cogitron

Developers (and assessors) of AI-based systems are seeking for a structured development approach; users are seeking for a guidance on the trustworthiness of AI-based applications. – This is what development standards should deliver, and this is the topic of the VDE-AR-E 2842-61 “development and trustworthiness of autonomous/cognitive systems”. This standard – actually an application rule (Anwendungsregel) – is based on the IEC 61508, extends the well-known safety reference lifecycle and ads special consideration of the overall solution, trustworthiness as combined term (incl. safety, security, usability, ethics), hierarchical system development and AI-based components as a special kind of technology. The presentation will introduce the VDE-AR-E 2842-61 and give an insight on the new methods and concepts proposed by this standard to achieve and maintain the overall performance of the solution and the intended behavior and trustworthiness of the autonomous/cognitive system.

12:00 - 12:30

Edge Machine Learning for Saftey Cirtical Systems Dr. Rikard König, Ekkono Solutions

Edge Machine Learning (ML) has gone from hot topic to reality. We constantly see new examples of how ML is integrated in devices to make them smarter and autonomous. However, when devices make more decisions themselves, it's crucial that we can trust them to pick the best choice. Especially in safety critical systems. Traditional statistical techniques like Confidence Bounds rely on assumptions, e.g. normally distributed data, that rarely holds in ML applications, and can hence not be used. Researchers have made great progress in this area with a framework called Conformal Prediction, which can produce individual error bounds for each prediction with arbitrary accuracy. Furthermore, the error bounds can be guaranteed under the same assumption that machine learning is based on, i.e. I.I.D assumption. In this talk we present the Conformal Prediction framework, show how itâ€™s implemented in Ekkonoâ€™s own Edge ML library and how it is used in reality.

12:30 - 12:45

Discussion/Q&A with Session Chair: Karlheinz Ronge

11:00 - 12:45

Session 6.7 Software & Systems-Engineering: DevOps

11:00 - 11:30

Ready for EmbSecDevOps? Enhance your Embedded Product With Security-by-Design Decisions and Maintain Security in Your Development Lifecycle! Michael Brandl, CYOSS

Traditional models for embedded software development often fail - either because the security requirements are not in place from the start or because the development process is not flexible enough to add security features efficiently. Requirements engineering that focuses on "security by design" may not cover all future applications, but it does provide a much better foundation than placing security at the back of the queue. The introduction of DevOps technologies to implement functional software on embedded devices will improve the way in which we respond to problems, add new functionality and maintain security. Ensuring a transparent development process from structured story backlog, automated testing and requirements tracking to continuous deployment is critical to the security of embedded systems. Embedding security in the early stages of the product development lifecycle, managed by an agile team with a DevOps mindset, is the key to creating a sustainable solution.

11:30 - 12:00

DevOps-Toolchains in Embedded Software Development - Towards Trancparency and Traceability Dmitry Chibisov, Dr. Chibisov Software Quality

Embedded software development requires close collaboration between teams of engineers. At the same time, a multitude of software tools that were never designed to work together is used for development, requirements, test and project management, issue tracking, change and risk analysis, continuous integration, test and release automation. Brute force integration of such tools leads not only to high costs needed to build and maintain modern system development toolchains but also does not provide the necessary transparency and traceability of activities within teams and across team boundaries. In this talk we consider typical toolchains for software development and identify their gaps regarding efficient collaboration within and, especially, across organizational units. With the aid of examples, the relationships and dependencies, that are not sufficiently supported by existing tools, become apparent. Finally, we discuss the possibilities to support such dependencies and fill the gaps.

12:00 - 12:30

IoT in the Age of DevOps Florian Bader, AIT; Thomas Rümmler, AIT

DevOps has already arrived in many companies. However, for many organizations dealing simultaneously with IoT, the question arises: How do DevOps and IoT work together? The provisioning of devices and the rollout of software should also be fully automated according to DevOps principles. In this break-out session we show how DevOps practices and principles can be combined with IoT. Using Azure IoT Edge as an example, different scenarios relevant in an IoT environment will be demonstrated.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Peter Fromm

11:00 - 12:45

Session 8.4 Autonomous Engineering: AI Hardware

11:00 - 11:30

Track Keynote: Dependable Neural Networks Through Redundancy – Comparing Architectures Prof. Hans Dermot Doran, Zürich University of Applied Sciences

In this presentation we make a contribution to the debate on redundant architectures in machine learning. Backing up our discussion with substantial experimental evidence on both standard GPU and FPGA platforms, we examine the computational cost of a common ML classification task, examine the real-time characteristics of the task, and, by explaining how this task is implemented on the platform, the actual real-time characteristics on these platforms. We examine the coordination/synchronisation issues between the redundant components and clearly enumerate the dependability considerations that need to be taken into account in this area as well. We also discuss the maintainability and extensionability of both the configurations and platforms. The presentation, aimed at decision makers as well as R&D interested, completes with a review and suggestions for further work/consideration

11:30 - 12:00

Transforming IoT Endpoints with AI Chris Shore, Arm

There has never been so much compute power available in IoT devices - now is the time to be designing and deploying true intelligence in IoT endpoints. Devices which are aware of their environment are capable of adding huge value to the data they collect and the services which they enable. Learn how new and emerging technology can enable your devices to see, hear and feel what is going on, interpret what they sense, take autonomous actions and generate real, trusted, valued data for the cloud. Recent developments in hardware and software will enable a step change in the capability of resource-constrained endpoint platforms, allowing developers to build vision, voice and vibration capability, coupled with genuine intelligence at the endpoint.

12:00 - 12:30

Enhancing the Deployment of Quantization Aware DNN for Inference Acceleration With Vitis AI Alok Gupta, Xilinx

Deploying deep learning networks from the training environment to embedded platforms for inference might be a complex task that introduces a number of technical challenges that must be addressed. Quantization in neural networks converts a floating point network to use low precision integer, Which helps in accelerating inference by utilizing higher throughput integer math pipelines And reduces memory traffic by using fewer bits per value. While INT8 & INT4 quantization offers speed-up for inference it can also impact the accuracy of the network. In Paper Author will explain various different choices of Quantization's for Mapping (scale vs affine) , Granularity (Per Tensor vs Per-Feature) and Range calibration (max range vs clipping) and there impacts on the accuracy and how Vitis AI helps solve this for Inference acceleration with advanced optimizations and unleashes the full potential of acceleration on Adaptive compute platforms by finetuning popular CNN's on Inference Engine.

12:30 - 12:45

Discussion/Q&A with Session Chair: Farhad Mafie

11:00 - 12:45

Sesion 9.1 HMI Libraries

11:00 - 11:30

Vulkan SC – Safety Critical Graphics and Compute Library Michael Pyne, CoreAVI & Industrial

Vulkan is the next generation graphics and compute library, providing full access to the performance of the latest GPUs. Traditionally, Graphics and Compute were using different libraries, CUDA, OpenCL for Compute and OpenGL for Graphics. Vulkan enables simultaneous Graphics and Compute in one library, with more emphasis on the GPU reducing CPU load, enabling low power SoCâ€™s with advanced graphics capabilities. The Khronos Group manages the open standards for OpenCL, OpenGL and Vulkan, Vulkan provides a major change with graphics and massive parallel GPGPU (General Purpose GPU) compute within the same library. This white paper examines in detail the Vulkan SC software architecture, embedded Graphics and Compute for Aerospace, Automotive, Industrial and Transportation industries, where applications such as Sensor Processing, Embedded Vision, Artificial Intelligence and Deep Machine learning may have safety certification requirements for next generation embedded systems.

11:30 - 12:00

Standardising Low-cost GPUs for Embedded Industrial Use Kristof Beets, Imagination Technologies

Standardising low-cost GPUs for embedded industrial use This session dives into the requirements for GPUs for usage in modern industrial scenarios including whitegoods, smart devices, security solutions and information displays. Covering both hardware, e.g. fillrate centric GUI rendering centric feature set, and software, e.g. Khronos standard and Open Source, requirements essential to help enable the diverse usage scenarios for this market segment with increasing needs for user friendly visual interactions.

12:00 - 12:30

Cross-Platform HMI Families for Modern Embedded Devices Andy Walter, macio; Rainer Dorau, macio

Modern embedded devices often come with 2 or 3 types of HMIs: A local, truly embedded HMI, which is shown on the display of the embedded device itself, and one or two kind of remote HMIs that run on smart devices or PCs, and which directly or indirectly connect to the embedded device. Even though the three HMIs pursue somewhat different objectives, they all belong to the same product and may be used by the same operators, so they should all be integrated in one global concept. The authors explain design principles and software techniques which help to form a sound and performing cross-device and cross-platform user experience. The art is to use the individual benefits of the several, very different platforms and still unify common principles to make the user feel familiar even with those platforms that he or she uses only occasionally.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Thomas Fischer

Parallel Sessions

13:30 - 15:15

Session 1.8 Low Energy Devices

13:30 - 14:00

Power Savings for IoT Devices Hans-Guenter Kremser, Texas Instruments Deutschland

This presentation explains the advantages of using the TI Nanotimer IC TPL5110 for battery powered IoT devices with the target to extend the battery life. After a short introduction into power cycled applications a comparison between - low power mode microcontroller - well known Timer-IC 555 and - Nano Timer IC TPL5110 based power cycling will be discussed as well as an explanation when it makes sense to use a Nano Timer. Based on a real application “IoT Water Level Sensor” the power consumption and related battery life time dependency on duty cycle is presented.

14:00 - 14:30

Unveiling Scalable and Open Source Energy Star Network Proxying Solution for Greener Connected World Dr. Yoong Siang Song, Intel

Energy Star Network Proxy agent technology has low-power processing agent that maintains network presence of a device while the host processor is at low-power state. This presentation shares the software architecture and design considerations of Network Proxy framework implemented in Linux and Zephyr OS. Moreover, the paper will share an important technology that showcases how the control of network controller can be seamlessly transferred between the low-power agent and host processor. In addition, participants will gain knowledge about system level integration of Network Proxy framework with open source software, e.g. CUPS, AVAHI (mDNS), and net-snmp, in building a low-power IoT appliances, e.g. multi-function printer, that meets Energy Star 3.0 power requirements. Most importantly, the framework can be adapted to create other IoT appliances that require other networking protocols used in edge network, such as MLD, IGMP, MQTT, and NAPT.

14:30 - 15:00

Battery-free LPWAN Nodes for Bridges and Walls Prof. Dr. Marcel Meli, ZHAW

This presentation builds on an early work where we evaluated the potential of harvesting energy from concrete walls using temperature differences. We have now built and installed several LPWAN nodes that are powered solely from TEGs, using small temperature differences. With efficient harvesting, those nodes can scavenge sufficient energy to sense parameters in the civil infrastructure environment and communicate with gateways that are several kilometres away. This brings battery-free monitoring of walls and bridges one step closer to reality. After giving an overview of the technologies involved and discussing the basis of TEG harvesting, we will present first results and early conclusions of several weeks of measurement activity.

15:00 - 15:15

Discussion/Q&A with Session Chair: Prof. Andreas Rüst

13:30 - 15:15

Session 2.8 Bluetooth

13:30 - 14:00

Improving the Connection Range and Time in Car Access Systems Using Bluetooth Role Switching Techniques David Lara, Texas Instruments

Bluetooth low energy based car access systems are now being implemented in passenger cars. This system typically has a smart key module and multiple satellite modules that are physically distributed around the car. In a system like this, only the smart key module can be connected to a phone(s) or keyfob(s). In some cases, depending on where the master module is placed and the surroundings of the vehicle (walls, more cars, etc), this module could be obstructed and the connection range will be substantially reduced. In this scenario the connection between smart key module and the phone(s) or keyfob(s) would not happen until the user gets closer to the vehicle. Therefore, the car access system has less time to localize the driver which adds delay to the vehicle unlocking the doors. This could be noticed by the driver if the vehicle does not unlock when they are ready to enter. This paper will discuss the methods that can be used to improve the connection range and reducing the connection.

14:00 - 14:30

Next Generation Bluetooth Audio Becomes a Reality Nick Hunn, WiFore

The latest Bluetooth specifications are changing the way we use voice and consume music. They provide enhanced encoding and a range of new topologies which bring more control to hearables, allowing users to traverse a much more complex audio ecosystem. This presentation looks at the state of the new standards and the way in which they will be embedded in a far wider range of audio-enabled products.

14:30 - 15:00

Understanding Reliability in Bluetooth Technology Martin Woolley, Bluetooth SIG

Achieving reliability is a common goal of most communication systems, whatever their technological basis. But in practice, achieving this goal usually presents some serious engineering challenges. Most wireless communications technologies use radio as the underlying physical medium for conveying data between devices. The use of radio has many inherent issues that make achieving reliability, especially in environments containing larger numbers of wireless devices, somewhat difficult. But the use of radio is not the only source of reliability challenges. The job of the wireless communication technology designer is without question, a tough one. Bluetooth technology offers numerous capabilities and techniques, distributed throughout the stack for achieving reliable communication in the most formidable circumstances and on top of an inherently unreliable physical medium. In this session, we’ll review sources of potential reliability issues and how Bluetooth technology addresses them.

15:00 - 15:15

Discussion/Q&A with Session Chair: Prof. Dr. Dirk Pesch

13:30 - 15:15

Session 4.8 Safety & Security: Security Hardware

13:30 - 14:00

Secure IoT Firmware For RISC-V Processors Cesare Garlati, Hex Five Security

Building secure RISC-V devices is challenging as the RISC-V ISA doesn't specify the hardware blocks necessary for the trusted execution of the many 3rd party components of the software stack. RISC-V developers are left alone figuring out how to shield trusted code from unverified 3rd party software libraries. In this session, Cesare Garlati and Sandro Pinto, renowned embedded security experts and long-time supporters of RISC-V, will introduce the industry-first secure IoT stack for RISC-V. The presentation covers all hardware and software components necessary to build state-of-the-art device, firmware, and cloud management service. These include a RISC-V 32-bit SoC, multi-zone Trusted Execution Environment, TCP/IP connectivity, TLS/ECC cryptography, and MQTT client and broker providing telemetry and OTA applications deployment and firmware updates. All components are built on free and open standards, distributed under permissive licensing, and freely available for download from GitHub.

14:00 - 14:30

Keep Device Data Safe With Secure Erase Thom Denholm, Tuxera

Removing data securely from flash media is more challenging than older magnetic designs, and military spec overwrite is often useless. The software and firmware must work in unison to provide secure solutions that are increasingly in demand. In this session, we detail the secure interface from the application to the media and point out the possible pitfalls along the way.

14:30 - 15:00

DRAM as Security and Privacy Threat to IoT and Embedded Systems Hans Diesing, Zentel EMEA

Since 2014 with the introduction of DDR3 SDRAMs it became apparent that those were vulnerable to Row Hammer side channel attacks causing Bit Flips by frequently repeated activation of adjacent word lines. More vulnerabilities became evident in subsequent years such as remote attacks via Java scripts or even readout of decryption code hidden by the Operating System. System providers were hoping to solve the problems with introduction of a fourth DDR generation by a new feature called Targeted Row Refresh. However recent research from Amsterdam and work from the ETH Zurich shows that with more than three aggressor word lines the new DRAMs are even more vulnerable than before and that with the shrinking chip structures of DDR4 or it's mobile versions in recent smartphones the threat got even worse than ever. What are the chances to minimize the risks or even to avoid hacking threats into critical IoT infrastructures since integrated ECC or software fixes were unable to close the loophole?

15:00 - 15:15

Discussion/Q&A with Session Chair: Karlheinz Ronge

13:30 - 15:15

Session 6.8 Software & Systems-Engineering: DevOps / MBD

13:30 - 14:00

DevSecOps Carves a Path to Digital Transformation for Autonomous Embedded Systems Bruno Chaves, Wind River

In 2009, a Belgium engineer named Patrick Debois launched the first DevOps Days. This event was a real success and the hashtag #DevOps ultimately appeared on Twitter for the first time. Ten years later, DevOps is widely used in the industry and has even been extended to incorporate security as DevSecOps. Although originally created for enterprise IT systems, the ongoing digital transformation due to the convergence of IT and operational technology (OT), the adoption of DevSecOps for embedded systems development provides the potential to accelerate the pace of innovation and deployment of new capabilities. In this paper, we will explore how DevSecOps can be applied to industry. We will discuss the challenges of traditional development approaches and integration, and how the use of DevSecOps pipelines and containerized tool workflows can accelerate software development, improve robustness and security testing.

14:00 - 14:30

Securing the DevSecOps Platform: Approaches, Methods, and Tools Arlen Baker, Wind River

DevOps is enabling faster and more secure software to devices by tying together development and operations. Much of the security focus is on “shifting left” the security testing in the development lifecycle of the software. However, in order to put the “Sec” into DevSecOps, the development environment itself must first be secured. This presentation provides a summary of: - A security assessment of the essential elements of a DevSecOps platform - The methods used in securing the platform including: o Hardware Security Module o Zero Trust Network principles o Privilege Access Management o Service Mesh usage o Security Validation tools o Software Supply Chain Provenance o Vulnerability Scanning o Kubernetes secrets management We also cover the lessons learned in engaging a third-party penetration test company to confirm our DevSecOps platform is indeed, secure.

14:30 - 15:00

From MATLAB to C Code for Heterogeneous Embedded Systems – Using Abstraction Levels for Specialized Optimizations Oliver Oey, emmtrix Technologies

Today, high-performance embedded systems more and more rely on multiple general-purpose processing cores coupled with accelerators like GPUs or DSPs. Getting the best performance out of these platforms poses a big challenge for developers, as detailed knowledge about the hardware is required. In this paper, we propose a novel approach to decouple the algorithm development from the target-specific optimization. By starting with the abstract programming language MATLAB, the developer can focus on the actual implementation of the algorithm without worrying about the selected target platform. This allows for optimizations on the algorithmic level. Converting this code to C allows for optimizations on code level that can be used for parallelization on the task level. Finally, the focus on the data level allows for further improvements in accessing the data from all processing elements. By combining all these optimization steps, target optimized code can be acquired in a very efficient way.

15:00 - 15:15

Discussion/Q&A with Session Chair: Prof. Dr. Peter Fromm

13:30 - 15:15

Session 8.5 Autonomous Engineering: AI Use Cases

13:30 - 14:00

Algorithms for Distributed Sensor Fusion & Tracking Dimitri Hamidi, The Mathworks

Multi-object detection and tracking with spatially distributed sensor networks arise in several applications such as in automotive, robotics and surveillance. The sensors involved often provide incomplete observations such as bearing- or range-only measurements, thus posing a challenge to the task of retrieving the targets and estimating their state. In this paper we present some examples for demanding sensor fusion scenarios and explore common centralized fusion approaches using different estimation filters and tracking algorithms for the aforementioned class of sensors and architectures. We furthermore show how to create multi-platform scenarios, generate object detentions, design multi sensor-multi multi-object trackers and automatically evaluate trade-offs and system performance using state of the art tracking metrics

14:00 - 14:30

Optical Flow Odometry Dr. William Lovegrove, Bob Jones University

This paper surveys the role of odometry in autonomous vehicles, describes the traditional sensors used for odometry, and presents the use of optical flow odometers as an alternative, including ground facing and forward facing cameras. Challenges discussed include illumination, self-shadowing, and velocity limits. Results are presented from our use of an optical flow odometer on Bruin-3, our autonomous vehicle designed and built for the Intelligent Ground Vehicle Competition.

14:30 - 15:00

Reducing the Energy Consumption of a Refrigerator Using Reinforcement Machine Learning Özgür Özkan, Arcelik; Cameron LaFolette, Arm

With climate change and energy sustainability at the forefront of human efforts to create a sustainable future, we are striving for new ways to reduce energy consumption and our carbon footprint. This paper explains a practical solution about how to reduce energy consumption of even the most energy efficient consumer refrigerators by using reinforcement Machine Learning techniques built on an Arm Cortex-M processor that is built-in to the appliance. By using a neural network to implement a reward policy, the performance of the control loops controlling the compressor and fan in the appliance is continually analysed and adjusted. The appliance autonomously self learns and adjusts to reduce power consumption optimally no matter what its environment and operation conditions. This paper reveals the modelling techniques, the reinforcement learning ML algorithms, and the results of physical hardware testing and validation of the solution.

15:00 - 15:15

Discussion/Q&A with Session Chair: Farhad Mafie

13:30 - 15:15

Sesion 9.2 HMI Design Methods

13:30 - 14:00

Track Keynote: Human Factors and User Interface Technology for Embedded Systems Prof. Robert Oshana, NXP Semiconductors

From a human factors perspective, we must shift the design perspective away from technology as the end all and more towards usability for embedded devices. The goal of this session is to raise awareness for the importance of user-centered principles to the design of good interfaces and effective human-computer interaction. Analysis of effective human-centered data for interface and interaction requirements provides a firm foundation for the actual user-centered interface design and implementation, and the evaluation of an interface and its interaction quality. Other topics include the study of human characteristics affected by interface design, requirements data collection and analysis, user-centered approaches to software engineering, and evaluation of interface and interaction quality. We will use several industry examples to demonstrate these concepts.

14:00 - 14:30

Strike the Right Balance of Performance and Visual Experience for Hi-Res Displays Using MCU Graphics Accelerators Victor Hugo Osornio, NXP Semiconductors

Demand for visual user interfaces is on the rise; physical knobs, buttons and seven-segment displays are evolving into hi-res display interfaces. Smart phones have set a standard for these interfaces; we crave detailed graphics and smooth animations on all our devices. Implementing these experiences using an MCU sometimes forces developers to compromise on their vision – simplifying their design or reducing frame rate. In this session, learn how i.MXRT1170's 3 graphics accelerators allow you to create an application closer to the vision you initially had. We will walk through how to use them in unison: GPU2D for scalable vector graphics, blending and 2.5D transformations. LCDIFv2’s multilayer on-the-fly blending capabilities enable rendering of high-resolution indexed color backgrounds. PXP’s blitting capabilities allow you to offload 2D blending operations from the main GPU, enhancing the 2D rendering capabilities of the system or use it as a failsafe alternative to the main GPU2.

14:30 - 15:00

How to Drive Down the Cost and Power of On-device Voice-based Devices Kobus Marneweck, Arm; Vikrant Singh Tomar, Arm

Smart speakers have exploded in recent years and consumers have become used to controlling devices with their voice. The next evolution in this trend will be to reduce the cost, power consumption for battery operation and the ability to operate untethered. A combination of technological advances is making this possible, from reducing the processing and memory requirements for ML models for keyword spotting and speech recognition to the improved tooling experience for developers and the improved processing capabilities of small, low-power MCUs. In this paper, we will demonstrate how to develop a voice-enabled device utilizing low-cost, low-power Cortex-M microcontrollers with optimised tools and software. We will also discuss and advantages of local voice solutions that provide voice user interface to the user in their native language or even in multiple languages concurrently without requiring an internet connection.

15:00 - 15:15

Discussion/Q&A with Session Chair: Dr. Bernd Hense

15:30 - 16:10

Keynote 4 Conference Keynote Randall Restle

Parallel Sessions

16:15 - 18:00

Session 1.9 Edge Computing

16:15 - 16:45

Connect Code – Direct, Serverless, Schemaless, Non Intrusive and Asynchronous Dr. Burkhard Heisen, Heisenware

The world is getting smart and millions of yet isolated things need to talk to the internet. While the hardware is already well prepared with WiFi or GSM modules on even the smallest commercially-off-the-shelf microchips, the efforts on the software side are still immense. Creating new or transforming existing code that connects in a secure and reliable way to a remote location is still a very challenging task, especially when considering the limitations of embedded C/C++ technology. You will see how simple such a complex task can become when utilizing modern and advanced features of C++ and NodeJS combined with an asynchronous MQTT-based messaging system as realized in the new open-source library VRPC (https://vrpc.io). Controlling embedded logic by a web app is becoming a task that can be prototyped in a few hours. It will be shown how VRPC as well is prepared for turning such prototypes into serious production settings including service-discovery, encryption, access control and so on.

16:45 - 17:15

The Power of AI and Edge Computing in Achieving Defect-Free Factories Brian McCarson, Intel

Most manufacturers would agree that one of their top priorities is producing high product quality products. This can be challenging due to a number of factors, such as time constraints, cost of inspection steps or lack of consistency in the manual inspection process. According to several studies by Intel, AI and edge computing make it possible to positively identify up to 99% of visible product defects before a part leaves the line. By running AI at the edge, manufacturers have seen major improvements including fewer customer returns, reduced operational costs, and more efficient and reliable tools and processes. Edge computing is bringing AI compute closer to the origin of data, closer to the mass of sensors connected to the machines, and closer to devices on the factory floor. In this talk, Intel will discuss how an advanced analytics pipeline combined with the power of AI can achieve significant benefits for Industrial IoT companies and their customers.

17:15 - 17:45

Edge Computing Architectures for the Management of Embedded IoT Devices Prof. Robert Oshana, NXP Semiconductors

The lifecycle of an embedded IoT device requires a number of process and software engineering steps to manage that device through its different phases of existence, from key and certificate injection, firmware secure provisioning, and secure onboarding to edge and cloud based management including in-field and over the air updates, device monitoring, platform upgrades, application and services updates, keys and certificate management and finally decommissioning. Those that will succeed at this will be able to offer a complete, scalable, cost effective solution, ready for production deployment, with the ability to address both small and larger customers using industry standard frameworks that can also be leveraged in part by big customers with proprietary infrastructures. In this talk we will discuss the software engineering technologies and process steps required to deliver an open customizable and secure operating system and firmware platform for an IoT/Edge product's lifecycle.

17:45 - 18:00

Discussion/Q&A with Session Chair: Matthias Müller

16:15 - 18:00

Session 2.9 Large-Scale Wireless Connectivity

16:15 - 16:45

6LoWPAN Solution for Smart Metering Application Using Sub-1GHz Radio and STM32 Microcontroller Indar Singhal, STMicroelectronics

This paper describes 6LoWPAN based smart metering solution to collect the Wireless data and monitor the power consumption.All meters will connect to ROOT using CONTIKI based 6LoWPAN mesh network technology.Data is encrypted with AES key which can be periodically changed by ROOT through a commissioning command.All the devices have a capability of either being Node or ROOT.It can be decided during the provisioning.RF and network parameters are saved in the flash memory of MCU.During the configuration, meter is whitelisted with the ROOT.Hence, as soon as the meter is powered on, it will immediately establish a mesh network and connect with ROOT.In case of power failure, system will restore the last known network parameters from MCU flash and immediately reestablish the network.The joining process is interoperable as per RPL standards.User can config RF and network parameters either through RF commissioning protocol or through AT cmd sets.The appli support UDP ports for data communications

16:45 - 17:15

Throughput and Latency Concerns When Designing a Mesh Network With Many Nodes Marie Hernes, Texas Intruments Norway

Wi-SUN is a wireless communication standard aiming to enable large-scale IOT networks in a mesh structure. The network typically consists of line powered routers and gateways, and battery powered end nodes. In a mesh network the packet latency will be determined by the number of jumps a packet needs to travel from the originating device to the destination. This will be affected by the number of devices in the network. The data rate is affected by parameters such as symbol rate in the chosen PHY, payload length and number of jumps. In this session we walk through some of the main considerations when designing a Wi-SUN mesh network. We will look at network planning and specific concerns for an end node in a Wi-SUN network. As an example, we will look at the Texas Instruments Wi-SUN implementation.

17:15 - 17:45

Wi-SUN – Key to Unlocking Massive IoT Soumya Shyamasundar, Silicon Labs; Abitzen Xavier, Silicon Labs

Wireless Smart Ubiquitous Network (Wi-SUN) is the leading IPv6 sub-GHz mesh technology for smart city and smart utility applications. Wi-SUN brings Smart Ubiquitous Networks to service providers, utilities, municipalities/local government and other enterprises, by enabling interoperable, multi-service and secure wireless mesh networks. Wi-SUN can be used for large-scale outdoor IoT wireless communication networks in a wide range of applications covering both line powered and battery powered nodes. This presentation aims to illustrate benefits of Wi-SUN as a technology and discuss solutions to grow Wi-SUN to create smart connected sustainable cities.

17:45 - 18:00

Discussion/Q&A with Session Chair: Prof. Dr. Dirk Pesch

16:15 - 18:00

Session 4.9 Safety & Security: Security Use Cases

16:15 - 16:45

Seamless integration of Cyber Security with Functional Safety will Make Autonomous Driving for Automotive and Industry Solutions Secure and Robust Thorsten Lorenzen, Texas Instruments Sales

Automotive and Industrial manufacturers continue to push semi-autonomous and self-driving vehicles. The advancements in today's chip technology enable the path towards autonomous driving but require Cyber Security and Safety standards to merge into each other. This session explains a concept how Cyber Security and Functional Safety will complement each other and how their seamless integration will enable autonomous driving. The audience will learn how the ISO 26262 and the ISO 21434 standard form up a solid security and safety concept. The audience will understand the evaluation of security measures and how to implement these against threats. It goes beyond the accepted security enablers such as Root-Key-Programming and Secure-Boot-Procedures and showcases security enablers acting hand in hand with Functional Safety features such as BIST, Diagnostics, and Monitoring enabling Fail-Safe modes and Recovery paths. All this can operate along with key applications on a single processor.

16:45 - 17:15

Security Testing of a Lithotripter Medical Device Based on MDR and MDCG Wilfried Kirsch, softScheck; Prof. Dr. Hartmut Pohl, SoftScheck

As information stored in medical records grows in value and the number of available medical apps and usage of those in medical devices is constantly increasing, the healthcare industry is a growing target for cyberattacks. When it comes to medical devices, it should be the highest priority that the device is not only working properly (safety), but also secured against attackers, unauthorized access and manipulation. In the worst-case an attack of a criminal hacker could lead to a patients' death, as happened a few weeks ago in the Uniklinik Düsseldorf. We will report about how to identify several vulnerabilities in a lithotripter. Lithotripters are usually connected to the hospital network, have several interfaces, use an X-ray scanner and shock-waves to localize and destroy the kidney stones. The later two could a harm a patient, making the lithotripter an ideal target for criminals. We will discuss how to secure medical devices machines and medical software against attackers.

17:15 - 17:45

A Security Architecture for Protecting Safety-Critical Railway Infrastructure Prof. Dr. Christoph Krauß, Fraunhofer SIT

Digitization, connectivity, and use of commercial off-the-shelf technologies has reached safety-critical areas such as the railway sector. This creates new opportunities for attacks and makes it necessary to integrate IT security measures into railway systems. However, the integration of security mechanisms into a system certified according to the railway safety standard EN 50128 is a big challenge. This article gives an overview of an IT security architecture, which allows to operate security measures on safety systems such as object controllers. It consists of a hardware platform with a Trusted Platform Module (TPM) 2.0, a MILS (Multiple Independent Levels of Safety and Security) operating system (OS), and various security applications. The TPM serves as security anchor and enables, e.g., secure storage, measured boot, and remote attestation to detect tampering with the system software. The MILS OS ensures freedom of interference when running safety and security applications.

17:45 - 18:00

Discussion/Q&A with Session Chair: Karlheinz Ronge

16:15 - 18:00

Session 6.9 Software & Systems-Engineering: Software & System Quality

16:15 - 16:45

Finding the Serious Bugs that Matter with Advanced Static Analysis Paul Anderson, GrammaTech

Many teams use static analysis tools primarily to enforce coding standards like MISRA that are designed to make programming in highly risky languages such as C and C++ much less hazardous. However, because C and C++ are such dangerous languages, programs that seem perfectly compliant with these standards may still contain serious defects and security vulnerabilities due to the inadvertent introduction of undefined behavior. The primary purpose of advanced static analysis tools is to see past the superficial syntactic properties of programs and into their deep semantic meaning, and by doing so, find those bugs. This talk will describe how these tools work, and will show some concrete examples of real bugs that they found in production code, despite the code having gone through style checking, manual review, and testing. Finally, I will give a taste of how users can customize the tools to their own domain, thereby allowing users to greatly increase the value they receive from using them.

16:45 - 17:15

Optimizing Heterogeneous Compute Platforms for Domain Controllers Florent Lebeau, Arm

With sophisticated heterogeneous systems at their fingertips, developers are now able to create complex applications like those found in modern digital cockpits and autonomous vehicles. Analyzing and resolving performance problems can be difficult and time-consuming. Such complex hardware systems and software applications require powerful performance analysis workflow to discover how efficiently the code uses the system's CPU, GPU, NPU and ISP resources. It is particularly important to understand when dealing with multiple virtual machines for critical and non-critical workloads: - How to ensure response time requirements are met - How to identify overheads - How to maximize usage with multithreading or SIMD This talk will introduce tools and a methodology to help software engineers identify bottlenecks in their code, and get advice on how to optimize it. This approach will further augment the efficiency and user experience when performed as part of a continuous integration workflow.

17:15 - 17:45

Performance Measurement and Testing of Realtime MCU-virtualized Applications Dr. Stéphane Turlier, OpenSynergy

The advent of virtualization of applications on real-time systems creates new challenges for system architects, integrators, and testers. The latest generation of hypervisors for microcontrollers enables architectures with Virtual-CPUs running on multiple physical cores. Meanwhile, typical automotive applications such as powertrain, electrical-motor control, power management drive high-performance real-time requirements in the virtualization domain that it need to be addressed by specific measurement and testing techniques. We want to offer a review of different metrics and methods to achieve performance assessments. We will discuss the definition of typical context-switching, jitter, inter-VM real-time communication deadline monitoring criteria. We will elaborate on our findings, exploring different measurement techniques using either software instrumentation of the hypervisor code and virtual machines and hardware-tracing capabilities.

17:45 - 18:00

Discussion/Q&A with Session Chair: Dr. Klaus Grimm

16:15 - 18:00

Sesion 9.3 HMI Design Methods

16:15 - 16:45

When Embedded Experts are Scarce – Low-code/No-Code Graphics Software to the Rescue Jeff Stewart, Altia

As beautiful GUIs take over displays of everyday products, the demand for embedded coders to develop them is soaring. But there too few embedded developers in the world to do all the work. How do companies with urgent project schedules deliver? Leading companies use the entire team to overcome a limited number of coders and keep pace with product schedules. UX experts, graphic designers, system security experts and more are members of GUI teams; their input must make it onto the embedded device. Low-code/No-code GUI development environments empower teams to succeed. With this approach, embedded experts focus on getting their designs to hardware. The right software provides a shareable environment so that the entire team works with the same software, assets and core technology. A smart tool also confirms that software developers are building GUIs with features compatible with their hardware. We will discuss how low-code/no-code GUI development can be a game-changer for such projects.

16:45 - 17:15

Accelerating Graphics Rendering Performance for ADAS With Zynq UltraScale+ MPSoC Alok Gupta, Xilinx

Graphics Textures might be the most complicated part of rendering pipeline & are a part that has become more complicated in the most modern versions since they are so vital for the efficient creation of realistic images. It has been observed in some instances the use of an OpenGL texturing technique that is inefficient & results in lower frame rates. As graphics system generates images in a pipelined sequence of operations, where the slowest stage is often termed bottleneck. However the bottleneck might change when rendering a graphics frame. The bottleneck usually shifts, because some of the pipeline stages are executed on the CPU, & others on GPU and the bottlenecks keep changing. UltraScale+ MPSoC, which encapsulates multiple processing engines and the Fabric, helps the application to accelerate both 2D/3D graphics by providing flexibility to perform calculated work distribution between the GPU, PL Logic, and CPU, removing the performance bottlenecks and increasing the throughput.

17:15 - 17:45

How to Develop a Low Power, Robust, Secure Embedded Voice Capture Pipeline on a Single Arm Cortex M-class Device Brian Clinton, Arm

Focusing on constrained Voice system solutions this paper explores the different technology aspects to achieve a secure, robust system for low power, low cost voice enabled devices. This paper outlines the use case study of a constrained IoT voice assistant implemented on a single Cortex-M33 core. It runs Amazon Free RTOS, which is utilised in the application to control the timing and execution of the voice and audio rendering pipeline along with the external WiFi connection to the Amazon voice assistance services. The application also includes a robust Key Word Spotting network and a dedicated 2-mic audio processing front end for noise clean up and echo cancellation. This paper outlines the results of the computing performance and memory footprint for each function in the voice pipeline. It shows how to utilise trusted firmware used by a single core to implement both the stringent security features along and functional features in the voice pipeline.

17:45 - 18:00

Discussion/Q&A with Session Chair: Dr. Bernd Hense

Day 4 - Thursday, 04. March 2021

Parallel Sessions

11:00 - 12:45

Session 1.10 Security im IoT

11:00 - 11:30

New Aspects of PSA Certified for Securing IoT and Edge Devices Robert Coombs, Arm

When PSA Certified was launched at Embedded World in 2019 it had a positive impact on healing security fragmentation in the electronics industry. Most of the World’s leading chip vendors now have PSA Certified solutions that include a PSA Root of Trust (PSA-RoT) with a standardised software interface that acts as the foundation for device security. Today, software platforms and OEMs can use the PSA-RoT and PSA Certified Level 1 to document best practice and demonstrate they meet the device requirements of NIST and ETSI cyber security baseline requirements. This presentation focuses on the next stage of PSA Certified and how PSA Certified and open source reference implementations are being expanded to cover high performance IoT, higher levels of security assurance and robustness and using the latest security evaluation methodologies designed for extensibility. PSA Certified is relevant to IoT and Edge device makers, developers, software platforms, service providers and chip vendors.

11:30 - 12:00

A General IoT Security Classification Framework Dr. Oana Fabiana Andreescu, Internet of Trust

The current IoT landscape is heterogenous, comprising highly different devices in terms of scalability and reach. Similarly, from a security perspective the variations between devices is substantial, raising serious questions. Devising a rigorous security strategy and choosing IoT components judiciously is thus crucial. We designed a general IoT Security Framework for the classification of IoT systems from a security perspective. It is meant to guide both developers and users during a security-by-design approach in which the security parameter is integrated seamlessly from the start. The classification relies on an incremental security levels system and a use case assessment method. It may be used for comparing IoT solution types and for determining the most suitable one for a specific set of security concerns. Our framework was applied to a real-world LoRa-based IoT solution for collecting, transmitting and processing data in an industrial setting and assessed in the energy sector.

12:00 - 12:30

OPC UA PubSub IIOT Platform With Secure Embedded Secret Vincent Lacroix, Systerel

In the Industry 4.0 context, data are a valuable asset that must be protected. Ensuring the confidentiality and integrity of the data exchanged by the IIoT devices is challenging, specially when those devices are out of the companies premises or easily accessible (we call them out-premise devices). These devices become primary targets for attackers as a way to compromise data and cause damage to infrastructure or people. OPC UA PubSub provides the appropriate mechanisms to build scalable (e.g. one-to-many) secure and interoperable solutions with end-to-end encryption. However, authentication of IIoT devices remains a sensitive question, as it requires to securely embed secrets. We present a novel approach based on open source software aiming to secure out-premise devices authentication, enabling the confidentiality and integrity of data exchanges with the rest of the system. Our approach uses a Trusted Platform Module to protect the secrets embedded on devices. # 289

12:30 - 12:45

Discussion/Q&A with Session Chair: Thilo Schumann

11:00 - 12:45

Session 4.10 Safety & Security: Security Architectures

11:00 - 11:30

Functional Safety and Security for Microcontrollers: Conflict or Cooperation? Alessandro Bastoni, STMicroelectronics

When working with microcontrollers, functional safety and security aspects share a common root – dealing with unintended or incorrect device behavior. As they examine and analyze failures from different perspectives, functional safety and security considerations may sometimes be conflicting, while other times they remain in agreement. From an overall safety point of view, this paper explores how certain hardware- and software-based security features in a general-purpose microcontroller/microprocessor may be either beneficial or detrimental. Specific considerations will be analyzed in detail, such as the measurement of the intrinsic fault diagnostic capability for specific security hardware solutions as well as the beneficial contribution of security features to designs with mixed safety- and non-safety- related partitions.

11:30 - 12:00

Application of TPM2.0 in Industrial and Automotive Systems Using the Feature API of the Open Source Software Stack Florian Schreiner, Infineon Technologies

The Trusted Platform Module 2.0 (TPM 2.0) provides protection mechanisms to address threats for industrial and automotive systems. Developers who want to use the TPM 2.0 can make use of the latest Feature API specification of the TPM Software Stack (TSS) standards. The Feature API specification (FAPI) is a middleware software that is standardized and implemented as open source software. It reduces development efforts significantly for the integration on Linux and other embedded platforms, which enhances the adoption of TPM 2.0 in embedded systems. The FAPI standard provides enhanced features like automatic generation of key policies, key storage, provisioning and crypto-agility. The support of cryptographic profiles allows flexible configuration of the algorithms in order to enable interoperability between the systems. The presentation shows an overview of the latest FAPI standard and the TSS specification with use case examples of embedded and automotive systems.

12:00 - 12:30

Achieving Mixed Criticality and Cat3 Pld on Single_SoC Matteo Salardi, Intel

The growing interest into workloads consolidation and the willingness to limit the number of HW processing elements together with the related board components are key drivers of nowadays industrial architectures. In this paper, we present Intel's approach concerning the processing board (logic solver) of an industrial system based on a single SoC, where features and performance of Intel SoC are leveraged for running safety and non-safety workloads on the same CPU (mixed criticality), and to meet the Category 3 PL=d requirements as per ISO13849 standard. Hardware virtualization can be used to separate safety workload from non-safety workload. Shared memory enables high-speed communication between these areas. In combination with the very high floating-point processing capability, even complex, safety-relevant algorithms can be computed extremely fast.

12:30 - 12:45

Discussion/Q&A with Session Chair: Karlheinz Ronge

11:00 - 12:45

Session 6.10 Software & Systems-Engineering: Software Quality

11:00 - 11:30

Testing, Model Checking and Static Analysis – Dream Team or Rivals? Dr. Sebastian Krings, Axivion

Ensuring reliability and quality of software has become a necessity. This is especially true for safety critical systems. To do so, different techniques have been established in industry and academia. For instance, coding guidelines such as the MISRA standards have been developed. Additionally, software testing, static analysis and even model checking and formal proof are used. These approaches differ with respect to the effort needed and the environments they can be used efficiently in. In this talk, we will present a simple case study. Following the development of a light and speed control system, we will highlight how and when verification techniques can be employed and how selected requirements can be translated into properties to be checked. In particular, we will outline how to employ the mentioned techniques, how they work and which results to expect from them. Furthermore, we will highlight strengths and weaknesses of the different methods and discuss possible combinations.

11:30 - 12:00

The Practicalities of Automotive Software Safety Analysis Deepu Chandran, LDRA

The functional safety principles and methods for software development cited by ISO 26262 are generally well understood. But the techniques and mechanisms required to perform software safety analyses in accordance with Part 6 §7 are less well established. This paper will discuss the role of these software safety analyses in confirming the provision of the specified functions, behaviour and properties in accordance with software architectural design, and with the integrity required by the assigned ASIL. It will outline the roles of dependent failure analyses, functional or processing chains, and software fault models in the analysis of both static and dynamic aspects of the design, reflecting on the impact of system timing and execution, memory use, and information exchange on those techniques. Referencing examples of test cases used to comply with these ISO 26262 objectives, the paper will conclude by showing how automation can help to reduce the overheads associated with the exercise.

12:00 - 12:30

Secure Diagnostics for Connected Vehicles Dr. Ahmed Khan, Siemens Digital Industries Software; Dirk Vogel, Siemens Digital Industries Software

Vehicle network security requirements are becoming more stringent with vehicle systems facing hostile adversaries through a variety of entry points. Remote monitoring of vehicle system health is a vital component of a multilayered approach to vehicle security as well as overall vehicle safety and reliability. Managing the design of complex system architectures used to address automated driving and electrification while also addressing security and functional safety demands the adoption of a highly efficient, integrated, model-based systems engineering work flow. This presentation will include a framework for addressing the remote access requirements of connected vehicles including diagnostics over IP (DoIP) ISO 13400-2:2012 and the AUTOSAR DoIP specification, DoIP design analysis, automotive use cases for incorporation into relevant IEEE/ISO/AUTOSAR specifications for standardized automotive designs.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Holger Schlingloff

11:00 - 12:45

Session 7.1 Embedded Vision: Application Case Studies

11:00 - 11:30

Embedded Vision in ArgiTech: Livestock Weight Monitoring Lyubomyr Dutko, Lemberg Solutions

Embedded vision prototype for automated livestock weight monitoring. The system was designed for a Ukrainian agricultural company that specializes in growing pigs and cattle and selling self-produced food products - Barkom Ltd. To check the health conditions of their pigs, Barkom employees should regularly measure animals' weight. Up to now, they were doing it in a burdensome manual way. This issue prompted Barkom to automate pig weight monitoring. Lemberg Solutions was able to help Barkom through research and development. We started with a single approach regarding modeling, image processing and hardware design. Later we designed a stable device and established a data collection flow. To train the algorithm, we've also designed a custom hardware system for training data collection and preprocessing. Based on a complex of non-iterative neural networks and an innovative image recognition algorithm, our system allows visual estimation of the animal weight.

11:30 - 12:00

GPU FPGA Accelerated Real time System Implementation for Stereo 3D Mapping and Visual Odometry Yashwant Kumar Temburu, Indian Institute of Technology Bombay

We here purpose compact, low power architecture for real time stereo depth estimation and stereo visual odometry that can be easily used on the UAV (unmanned aerial vehicle). A novel implementation of Stereo odometry based on careful feature selection and tracking on GPU is described. It accelerates core computations like feature tracking, RANSAC based non linear solver using the GPU. 3D Mapping using stereo disparity estimation based on More Global Matching(MGM) a variant of SGM is implemented on FPGA. A Pipeline Architecture is introduced to increase throughput of the 3D map by leveraging multiple ARM cores. The programs are tested on Jetson Nano (an embedded GPU) and Ultra96 (ARM-FPGA Soc) which have less form factor and consume less power. Update rate of 20 is achieved for 6 degrees of freedom pose on Jetson Nano(60 on i7 core with Nvidia 1050ti) and an update rate of 16 fps is achieved for 3D point cloud on Ultra96 making the system desirable for above mentioned applications.

12:00 - 12:30

A Vision Based Unsupervised Method for Realtime Anomaly Detection in Welding Process Tara K. Thimmanaik, Intel

Employing robotic welding in high production applications, such as the automotive industry is a common practice. The most common form used in robotic welding is Gas metal arc welding (GMAW). Quality of the welded joints is of paramount importance to the strength and integrity of the final products. However, weld porosity caused due to trapped gases lead to an estimated 25% rejection during final inspection, leading to production delays and loss of revenue. In this session, we will cover Intel’s approach of using a vision based highly accurate and efficient method for real time detection of weld porosity. Different factors can cause weld porosity, but one of its highly reliable and consistent indicators is increase in intensity of the sparks around the weld gun. Based on that knowledge we employed a machine vision-based AI technique to monitor the spark formation in real time and detect defects as they occur to eliminate the rejections during final inspections.

12:30 - 12:45

Discussion/Q&A with Session Chair: Anne Wendel

11:00 - 12:45

Session 10.1 System-on-Chip: Complex IC & System Solutions

11:00 - 11:30

Maximising Energy Efficiency When Designing SoCs for Endpoint AI Gergely Kiss, Arm

As modern microcontrollers/SoCs get increasingly complex, designers face the challenge of (a) maximizing energy efficiency while (b) achieving ever higher level of integration. To address (a), the use of multiple power domains is widely adopted in the low power SoC market. At the same time, to address (b), many SoCs are formed out of multiple subsystems, where each subsystem can be reused for multiple projects, leading to better time to market and software reusability. To address the challenges arising from the combination of these requirements, a standardized low power control interface and a common power control concept is needed in the system architecture. In this paper, the deployment of these approaches in Arm Cortex-M based subsystems is demonstrated. In addition, to reduce the software burden of working out power domain dependency, a mechanism termed Power Dependency Control Matrix (PDCM) is introduced and its benefits are explained.

11:30 - 12:00

FPGA-based Modelling, IP-Implementation and Measurements of Aging Effects Due to TID or Electrical and Thermal Stress Vidwath Paramesh, iSyst Intelligente Systeme; Josef J. Schmid, iSyst Intelligente Systeme

The paper will give some background on an IP-Core for monitoring of aging effects especially for flash-based FPGAs. Real measurements in medical radiation environments were done. A new ROSC-IP shows the asymmetrical degradation for TID sensitivity. It was simulated with a real-number modelling methodology. A new architecture was developed to detect aging effects due to electrical and thermal stress. The results of accelerated life and stress tests will be discussed. Discussions with RADSAGA@Cern are ongoing concerning the ROSC-IP which could be of interest for all semiconductor vendors and CMOS technologies (PCM, Monitoring IP etc.). It has been shown that it is in principle possible to use the TID monitoring concept also for classic aging and wear-out measurements. The investigation of Xilinx SRAM-based FPGAs is ongoing; results expected in Q4/2020.

12:00 - 12:30

Automotive and Mobile: Converging Video Content Requirements Ralph Grundler, Synopsys; Antonio Salazar, Synopsys

Video technologies have always been a moving force through modern history, influencing almost all aspects of technology. In today's mobile driven world, this is certainly true. Automotive and mobile technologies have pushed the boundary and accelerate the evolution of technologies and video IPs. Protocols such as HDMI, CSI, DSI, as well as associated IP for compression, content protection and encryption, such as DSC, HDCP and MACsec, are constantly evolving to provide higher resolutions and features. To maintain the pace with such protocols it is mandatory to understand the IP, dependencies, trade offs, support structure and associated challenges relating to integration for both ASIC and FPGA perspectives all the way to validation and verification to meet these high demands.

12:30 - 12:45

Discussion/Q&A with Session Chair: Farhad Mafie

Parallel Sessions

13:30 - 15:15

Session 1.11 Security im IoT

13:30 - 14:00

Building Secure Industrial and Embedded Applications with PSA Certified Simon Butcher, Arm

Industrial automation will see huge growth over the next five years. An essential prerequisite to adoption of this technology will be building cybersecurity into the merging OT/IT environments. PSA Certified is a collaborative security program built and maintained by leading security companies and experts. The PSA Certified Framework provides a comprehensive framework for securing embedded devices. This talk will describe what this framework offers and how it can be utilised in industrial and embedded applications to secure devices. The talk will characterise the framework and its features, the root of trust it provides, and describe how this relates to industrial applications and how it can help meet the needs of the IIOT (Industrial Internet of Things), and how this can help meet industrial security certifications such as IEC62443.

14:00 - 14:30

Secure IoT Firmware For Cortex-M Processors Cesare Garlati, Hex Five Security

Developing secure IoT application is challenging. Traditional Cortex-M devices lack TrustZone like functionality for the safe execution of the many 3rd party components of the software stack. And the upgrade to new Cortex-M devices with TrustZone inexorably leads to a lengthy and expensive system redesign. In this session, hardware security experts Cesare Garlati and Sandro Pinto will introduce an alternative path to a TrustZone upgrade based on an innovative hardware-enforced software-defined Trusted Execution Environment. The presentation covers all software components necessary to build a complete state-of-the-art secure IoT firmware for any Cortex-M device – with or without TrustZone. These include the multi-zone Trusted Execution Environment, TCP/IP connectivity, TLS/ECC cryptography, and MQTT client providing telemetry and OTA updates. All components are built on free and open standards, distributed under permissive licensing, and freely available for download from GitHub.

14:30 - 15:00

Analyzing a Real-World Wireless IoT Encryption and Authentication Protocol Using a Threat Modeling Framework Jakob Buron, Silicon Labs

This paper analyzes the security properties of the Z-Wave Security2 framework, considering the residential home environment it is designed to operate in. Our analysis includes 10 years of experience of operating and maintaining real-world secure wireless residential networks. We describe the protocol and cryptographic primitives involved and proceed to model the threats using the Attack Tree Model quantifying the risk/cost of each attack venue, demonstrating that the overall system security encompasses far more than choosing the authenticated encryption scheme. We also discuss the challenges of operating in a wireless environment where simple RF jamming is both cheap and accessible. Furthermore, we analyze the consequences of internet connecting said system. A selection of embedded mitigations techniques will be presented and their effect on selected attacks will also be analyzed.

15:00 - 15:15

Discussion/Q&A with Session Chair: Thilo Schumann

13:30 - 15:15

Session 4.11 Safety & Security: Security Architectures

13:30 - 14:00

Accelerating Security for Linux IoT Endpoints Michele Riga, Arm; Shebu Varghese Kuriakose, Arm

Since the launch of PSA Certified, dozens of MCUs and low power devices have based their approach to security on the PSA Certified framework and implemented a PSA Root of Trust (PSA-RoT). The use of a widely-available standard security component and easy-to-use API makes it easier and quicker for OEMs to build in hardware-based security that meets both market requirements and NIST and ETSI cybersecurity baseline requirements. This presentation will cover how PSA Certified and Trusted Firmware-A, OP-TEE open source software projects are being expanded to cover more complex Linux-based systems that use application processors. This presentation will provide a step-by-step approach to build a suitably secure chip and how OEMs can use the PSA-RoT to build a secure connected device.

14:00 - 14:30

Security Considerations in Linux for the Automotive World Saurabh Arora, Elektrobit Automotive

In the current times, automotive companies rely heavily on Linux to provide a software platform for creating various solutions. Linux, with its open-source nature, is tunable, scalable and by far the most preferable software used in the automotive industry. An important required aspect in the automotive world is security and Linux here too provides many solutions on various levels. In this presentation, Saurabh talks about what are some of the security challenges in the automotive software using Linux as the base platform. Security while booting, software update, and security during the runtime is presented. Since many Linux distributions for the automotive software are based on the containers, it is also important to look at the container security aspects and security schemes for Linux distribution. Saurabh then talks about the available security mechanism in the Linux kernel with special attention to the Kernel Security Subsystem and how the above security challenges are addressed.

14:30 - 15:00

An Architecture For Trusted Operation of IoT Devices Colin Duggan, BG Networks; Kanimozhi Thangappan, Jasmin Infotech; Daniel Selvan Durairaj, Jasmin Infotech

Secure boot, encryption of executable code, and secure over the air (OTA) software updates are three of the fundamental and most important approaches in support of trusted execution of IoT devices. However independent implementation of these approaches, without extending the chain of trust and encrypting code stored in external flash, leaves holes in the attack surface that result in vulnerabilities to application software. Well known exploits have taken advantage these holes such as Miller / Valasek’s, and more recently Sky-Go’s automotive security research. This paper presents methods and an implementation, on an embedded processor, for addressing these vulnerabilities. The goal is to show a security software architecture, an overview of the implementation steps, and how these approaches would of defeated the exploits mentioned above, in order reduce the learning curve and help to shorten implementations that eliminate security vulnerabilities in IoT devices.

15:00 - 15:15

Discussion/Q&A with Session Chair: Karlheinz Ronge

13:30 - 15:15

Session 6.11 Software & Systems-Engineering: Software Quality: Static Analysis

13:30 - 14:00

Static Data and Control Coupling Analysis Dr. Daniel Kästner, AbsInt Angewandte Informatik

All current safety norms require determining the data and control flow in the source code and making sure that it is compliant to the intended control and data flow as defined in the software architecture. In traditional static code analysis, data accesses via pointer variables and control flow by function pointer calls might be missed. Using sound static analysis based on abstract interpretation, it is possible to guarantee that all data and function pointers are considered and that the possible data and control coupling is fully captured. This information can be used to complement traditional code coverage criteria by the degree of data and control coupling covered by the testing process, helping to identify relevant previously untested scenarios. The talk introduces the concept of data and control coupling, illustrates the approach of sound static code analysis and reports on practical experience obtained with the Astrée analyzer on industry-relevant code.

14:00 - 14:30

Combining Static Unit and Integration Analysis Dr. Daniel Kästner, AbsInt Angewandte Informatik

Runtime errors such as buffer overflows or data races are safety- and security-relevant code defects. A sound static analyzer reports all such defects in the code, or proves their absence, and covers further verification objectives such as code guideline checking. ISO 26262 recommends sound static analysis for software unit verification and for the verification of software integration. To reduce the false alarm rate, for each software unit or component a contract can be defined by providing assumptions on the inputs and assertions on the outputs. The work products of the unit analysis include steering directives for the analyzer to optimize precision as well as a categorization of each finding. To avoid duplicate effort, it is essential that these artefacts can be imported and reused for integration analysis, and vice versa. In this article we propose an analysis methodology that enables an automated and integrated modular workflow and minimizes turn-around times.

14:30 - 15:00

Maximizing the Value of Static Analysis for Modern Development Miroslaw Zielinski, Parasoft

Static analysis is a standard testing technique that's widespread in both enterprise IT and embedded/safety-critical industries. Teams can implement it as a part of the CI/CD pipeline and as an inherent part of the developer's desktop activities. For efficiency, Dev teams expect static analysis to seamlessly integrate with their workflows. Most are based on Git and Docker containers and heavily rely on dynamically created, short-living branches. Join us as we share our experience overcoming the significant challenges teams face when implementing static analysis into Git and Docker based development environments. We'll discuss: - Building strategies to propagate suppressions/waivers across branches. - Limiting analysis scope on the relevant changes for faster feedback. - Baselining of static analysis findings to identify newly added problems. - Deploying static analysis tools in the containerized environments.

15:00 - 15:15

Discussion/Q&A with Session Chair: Dr. Christian Hummert

13:30 - 15:15

Session 7.2 Embedded Vision: Systems Integration

13:30 - 14:00

Key Trends in the Deployment of Edge AI and Computer Vision Jeff Bier, Edge AI and Vision Alliance

With so much happening in edge AI and computer vision applications and technology, and happening so fast, it can be difficult to see the big picture. This talk by Jeff Bier, founder of the Edge AI and Vision Alliance, will examine the four most important trends that are fueling the proliferation of edge AI and vision applications and influencing the future of the industry: • Deep learning - including a focus on the key challenges of obtaining sufficient training data and managing workflows. • Streamlining edge development - thanks to cloud computing and higher levels of abstraction in both hardware and software, it is now much easier than ever before for developers to implement AI and vision capabilities in edge devices. • Fast, cheap, energy-efficient processors - massive investment in specialized processors is paying off, delivering 1000x improvements in performance and efficiency, enabling AI and vision to be deployed even in very cost- and energy-constrained applications at the edge. • New sensors - the introduction of new 3D optical, thermal, neuromorphic and other advanced sensor technologies into high-volume applications like mobile phones and automobiles has catalyzed a dramatic acceleration in innovation, collapsing the cost and complexity of implementing visual perception. Bier will explain what's fueling each of these key trends, and will highlight key implications for technology suppliers, solution developers and end-users. He will also provide technology and application examples illustrating each of these trends.

14:00 - 14:30

Benefits of Industrial Cameras for Embedded Vision Applications Felix Nikolaus, Allied Vision Technologies

Choosing the right camera for an embedded vision application is critical. Many aspects beyond size, weight and power (SWaP) are important for innovative solutions. Industrial cameras have been around for many years and have developed into a very stable and mature ecosystem. These cameras do have a lot of benefits like triggering, global shutter sensors, standard software interfaces or long-term availability. Discussing these camera features in the design phase for an embedded vision product is necessary. In this technical paper and the corresponding presentation, we analyze industrial vision camera features and show where embedded systems can benefit.

14:30 - 15:00

Faster Deployments With Software-defined Smart Cameras Michele Riga, Arm

Digital recording equipment are evolving into smart cameras, with shipments set to grow exponentially and billions of new devices expected to be installed in the next coming years. Smart camera deployments will happen in many different areas beyond the traditional surveillance market, from smart home and buildings, to manufacturing facilities and smart cities. What are the key trends that are enabling this revolution In the world of surveillance and monitoring? Many advanced features are now becoming common, such as security, over-the-air updates, and ability to perform machine and computer vision by successfully run evolving ML and AI algorithms. In addition, ease of software development across a wide variety of devices is of paramount importance to accelerate deployments. This presentation will provide an overview of the key technology powering the future smart cameras and enabling the transition towards software-defined camera.

15:00 - 15:15

Discussion/Q&A with Session Chair: Anne Wendel

13:30 - 15:15

Session 10.2 System-on-Chip: IP Core Design & Integration

13:30 - 14:00

Track Keynote: Architecture Trends for Sensing and Computing to Enable Automated Driving Robert Schweiger, Cadence Design Systems

The level of automation of a vehicle is the key driver for E/E architectures, sensor architectures and System-on-Chip architectures. Radar, Lidar and Camera are the key sensors to enable autonomous driving. However these sensors still need to be significantly improved in terms of resolution, power consumption, safety, form factor and cost but will also evolve to address new compute architectures. All these new technologies will dramatically increase the electronic content of a car which require to integrate more functionality on a chip, rather than on a PCB to provide the performance, safety and reliability in a small form factor device. As a result, a new class of high-performance System-on-Chip (SoC) and/or System-in-Package (SiP) is needed to process all sensor data and fuse them together to enable vehicles to become “aware” of their surroundings. This talk provides an overview on automotive trends and the implications for SoC design for sensors and automated driving platforms.

14:00 - 14:30

Secure Boot Concept on the Zynq Ultrascale+ MPSoC Thierry Delafontaine, Zürich University of Applied Sciences

The complexity of today's multiprocessor System-on-Chip (MPSoC) can lead to major security risks in embedded designs, as the available security functions are often not or insufficiently utilized. This presentation demonstrates a concept of a secure boot and runtime system on a Xilinx Zynq Ultrascale+ to prevent potential hacker attacks. The security concept is matched with dedicated on-chip security features like AES core, RSA core and hashing core. It also includes monitoring of environmental parameters such as voltage and temperature to detect tampering and prevent disclosure of data. In addition, secure key storage and various methods for minimizing key consumption are discussed. Finally, the talk covers the ARM TrustZone technology and the use of OP-TEE as a secure operating system. Three use cases with potential security problems are analyzed. A modular open-source reference design is provided on GitHub, which contains implementation examples for all the above features.

14:30 - 15:00

Standardizing the TEE – The IoT Opportunity Gil Bernabeu, GlobalPlatform

Every day more devices are connected to the internet in new verticals. The growing number of IoT products& complexity of them, however, introduces new challenges particularly for device makers and digital service providers that are not security experts. This presentation will explain why standardized device architecture, as well as Application Programming Interfaces (APIs) and associated training, compliance and security certification schemes, are critical. Delegates will receive: • An introduction to TEE architecture & different APIs enabling the development of secure services within a device, including the Trusted User Interface (TUI). • The value of TEE compliance & security certification, & the schemes supporting major technology players and enabling IoT use cases, with real world examples. • A step by step roadmap for building a successful TEE based on RISC-V architecture / value it delivers to help device makers connect new 'things' like control commands in smart homes

15:00 - 15:15

Discussion/Q&A with Session Chair: Farhad Mafie

15:30 - 16:10

Keynote 5 Conference Keynote Kevin Dallas

Parallel Sessions

16:15 - 18:00

Session 1.12 IoT Use Cases

16:15 - 16:45

Energy Prediction in Edge Environment for Smart Cities Oluwatobi Oyinlola, Intel

A smart energy distribution system is important to reduce energy and manage it efficiently. The IoT devices are installed in various buildings in the city, they use a lot of energy, and produce energy usage information. In the existing cloud system, it is difficult to analyze and transfer the data quickly, similarly impossible to receive the analysis result immediately. However, edge computing has the advantage of fast data analysis and supply analyzed results to the field. In this process, data is processed in the edge environment, where data has been collected, analyzed, and processed in the edge notes. In this study, we presented an energy prediction model based on the edge computing technique. We used a dataset where various environmental and energy use information has been considered. Also, we have used five different Machine Learning (ML) classifiers to classify the prediction model and assess the prediction performance.

16:45 - 17:15

LoRa 2.4G. plugging the precision positioning intelligence gap for Campus wide Use cases Albert Baker, Danalto

Achieving sub 5m accuracy using Low Power Wide Area Network technology natively without other tracking technologies has been a challenge to date in the world of personnel and asset tracking; a Massive IoT use case. Furthermore reducing the number of technologies needed to address indoor and outdoor use cases has proved to have been a barrier up until now. LoRa at 2.4GHz enables tracking at GPS like accuracy but over dedicated networks, at a lower power than LP-GPS and can work indoors with little infrastructure compared to incumbent technologies like BLE, WiFi or UWB. In this presentation, ranging mechanisms that are used to provide these next generation tracking systems will be explored and real world deployment examples will be described.

17:15 - 17:45

Using MQTT Based Adapters to Enable Testing for Industrial Applications (IIoT) Prof. Rix Groenboom, Parasoft

Software development often puts test automation to use, while testing in industrial automation is often a “manual” task. With the increase of complexity and variations in operating conditions, there's a strong need to adopt new approaches for testing. The methodology and technology from traditional software engineering can inspire the creation of more robust and mature testing processes for industrial automation. We present a novel approach for testing of industrial control systems by integrating powerful API testing technology through MQTT to directly communicate industry-relevant protocols such as ModBus and OPC UA. The result of this integration leads to a flexible framework that can communicate directly to Industrial Internet of Things (IIoT) systems and connect to backend IT systems. We'll share the results of the solution and discuss application areas in automotive and defense.

17:45 - 18:00

Discussion/Q&A with Session Chair: Thilo Schumann

16:15 - 18:00

Session 4.12 Safety & Security: Hacking

16:15 - 16:45

Fuzz Attacks for Embedded Network Devices DeWitt Seward, Silicon Labs

This paper covers fuzz testing which is used to find bug bounties for operating systems and web protocols. It can and should also be used to effectively harden embedded networking stacks. As more deep embedded devices become connected to the internet, they are subject to the same types of attacks as other internet connected devices.

16:45 - 17:15

Sidechannel Analysis in Embedded Devices DeWitt Seward, Silicon Labs

As we deploy more connected devices, we need to make sure they are built on secure platforms. This session demonstrates how easy it can be to extract an AES key using sidechannel in the real world and how to use this to select sidechannel-hardened solutions for future embedded system product developments.

17:15 - 17:45

Security is a System Level Problem: A Case Study Josh Norem, Silicon Labs

This paper presents two cases studies highlighting how the interaction between two function entities can result in non-functional security. The first looks at a cross discipline issue showing how the function of one group (in this case Product Test Engineering) can unintentionally bypass security processes and render device features such as secure boot or debug port locking ineffective. The second looks at an implementation of secure key storage that when combined with an ECC accelerator cannot store keys securely, despite both blocks being secure when in isolation. Through these case studies, we'll highlight the importance of conducting comprehensive security analyses and highlight the types of issues that security engineers should be on the lookout for.

17:45 - 18:00

Discussion/Q&A with Session Chair: Manuel Koschuch

16:15 - 18:00

Session 6.12 Software & Systems-Engineering: Software Quality: Coding

16:15 - 16:45

Dynamic Memory Allocation & Fragmentation in C & C++ Colin Walls, Mentor, a Siemens Business

In C and C++, it can be very convenient to allocate and de-allocate blocks of memory as and when needed. This is certainly standard practice in both languages and almost unavoidable in C++. However, the handling of such dynamic memory can be problematic and inefficient. For desktop applications, where memory is freely available, these difficulties can be ignored. For embedded - generally real time - applications, ignoring the issues is not an option. Dynamic memory allocation tends to be non-deterministic; the time taken to allocate memory may not be predictable and the memory pool may become fragmented, resulting in unexpected allocation failures. In this session the problems will be outlined in detail and an approach to deterministic dynamic memory allocation detailed.

16:45 - 17:15

Advanced Compiler Optimizations for the Smallest, Fastest Code Greg Davis, Green Hills Software

Embedded software developers, much more so than other software engineers, are concerned with their software at multiple levels. Since these days the vast majority of code is written in high level languages, the translation process between high level languages and machine assembly code, known as compilation, is crucial. Compiler technology has not yet run it course, and new cutting-edge optimizations have made enormous execution and code size savings. This talk will survey some of my favorite optimizations: some are old, but highly effective, while others are virtually unknown outside of the community of compiler developers.

17:15 - 17:45

Hack-proofing your C/C++ Code Greg Davis, Green Hills Software

While 85% of embedded designs use C and C++, these languages are notorious for allowing unsafe code practices that give hackers a way to attack. This talk shows exactly how to keep your internet-connected product safe by writing your code properly the first time. Well-proven tools and techniques can be used to augment any software design paradigm and to effectively hack-proof your code. Techniques include coding conventions, automatic run-time error checking, manual compile-time and run-time assertions, static analysis, and the most common mistakes to avoid.

17:45 - 18:00

Discussion/Q&A with Session Chair: Porf. Dr. Holger Schlingloff

16:15 - 18:00

Session 7.3 Embedded Vision: Systems Integration

16:15 - 16:45

Track Keynote: The State of Khronos Standards Powering the Future of Embedded Vision & Inferencing Neil Trevett, The Khronos Group

As machine learning advances, so too does the number of accelerators, processors, libraries and compilers in the market. Proprietary APIs and formats can create a complex industry landscape that hinders market growth. Open standards have an important role to play in enabling interoperability for faster, easier deployment of vision-based systems. In this session, Khronos President Neil Trevett will provide a state-of-the-industry update on the family of Khronos open standards for programming and deploying accelerated inferencing and embedded vision including OpenCL, Vulkan, OpenVX, SYCL and NNEF. The presentation will include future directions for these standards and provide attendees insights into which of these standards may be relevant to their embedded vision and inferencing projects.

16:45 - 17:15

Accelerated Computer Vision Processing Pipelines on Versal With AIE and PL Fabric Alok Gupta, Xilinx

Computer vision applications in Real-time Automated driving often require fast processing to condition the incoming image data. FPGA hardware accelerate vision processing, but algorithms need to be adapted to work on hardware. Image and Video Processing at its core utilizes multiple kernels which can span across diversified filters and classifiers , which needs kernel to kernel streaming with low latency and provide reduced memory accesses which results on performance and power gains. Author will discuss how Xilinx Versal AIE and PL Fabric will solve the problem of Programmable Acceleration of Multiple Domains with One Architecture and will explain why its much more efficient to operate on stream of pixels and adapting your algorithm to hardware for Vision Processing Pipelines on Xilinx Versal.

17:15 - 17:45

A Deterministic Approach to Inferencing on Real Time Safety Critical Embedded Systems Lucas Fryzek, Core Avionics & Industrial

When topics of safety and artificial intelligence (AI) arise, the focus often rests on concerns around proving the intent of a neural network (NN). Although proving the intent of a network is an important problem to solve, it is not the only problem when it comes to the application of NN in real time safety critical systems (RTSCS). A key problem in this domain is proving that the platform execution is deterministic. That means that the platform execution not only needs to provide results in a consistent and reliable fashion, but also needs to use a well-defined amount of memory. Existing AI platforms are built on technologies like Python that make use of techniques like run time garbage collection. Time has shown that these existing platforms have not been a great fit for RTSCS. This paper explores how one would deterministically inference a NN, and how a standard like Khronos’ OpenVX provides a platform for AI that will be applicable for real time safety critical systems.

17:45 - 18:00

Discussion/Q&A with Session Chair: Anne Wendel

16:15 - 18:00

Session 10.3 System-on-Chip: Analog RF & Mixed Signal

16:15 - 16:45

The Challenges of Combining Mixed Signal Connectivity IP Into Your SoC Roger Walker, Imagination Technologies

In this presentation, we will outline the difficulties of combining digital and analogue RF IP within a SoC. Designing in RF / Analogue is very different from purely digital designs. It needs a different approach to IP selection, design and validation. This presentation covers typical problems encountered when combining analogue and digital designs within an SoC. It reviews typical IP offerings, and gives some background to the risks associated with some of the design decisions. The aim is to give a better understanding of the risks, so that better project decisions can be made.

16:45 - 17:15

Semiconductor Process Selection from ESD Perspective: FinFET, SOI or CMOS? Benjamin Van Camp, Sofics

Many fabless companies struggle with the selection of their next process platform: FinFET or thin film SOI or in CMOS? Though on-chip protection against Electrostatic discharge (ESD) should not determine the choice of technology, it can impact design choices and ultimately cost of the product. For efficient ESD protection, 2 elements are important: the ESD strategy, and the vulnerability of the circuit. The clamp design lays bare the underlying technology restrictions: the SOI BOX limits heat dissipation, even worse in FinFET designs. Techniques to circumvent the issue lead to unacceptable DRC/LVS violations. Also, the transistor characteristics under ESD conditions are heavily influenced by the Fins and BOX. Design margins are shrinking, and I/O topological decisions have different results in FinFETs, SOI or CMOS. In the presentation device architecture and measurement data is used to compare 16nm FinFET, 22nm CMOS and 22nm SOI from the perspective of ESD robustness and I/O design.

17:15 - 17:45

Low Voltage Signal-Chain for the IoT Sensors of the Future Maurizio Gavardoni, Maxim Integrated

Internet of things is growing at amazing rate with the proliferation of environmental sensors such as temperatures, humidity, air pressure, air quality and others, with the potential to address human challenges in the coming decades. At the hardware level, many of these sensors operate wirelessly with a small battery that must ensure a small form factor and guarantee many years of life. Reducing power consumption to extend battery life and enable more features is the primary goal of sensor manufacturers. This paper presents an architectural shift, which creates a solution for this challenge. The analog sensor signal chain of the future operates at very low voltage, as low as 1V, and enables significant system power saving. This paper will explore the benefits and details of the analog signal chain of the future including extended battery life, simplified power and system architecture, and the signal chain accuracy and signal integrity.

17:45 - 18:00

Discussion/Q&A with Session Chair: Farhad Mafie

Day 5 - Friday, 05. March 2021

Parallel Sessions

11:00 - 12:45

Session 1.13 Security im IoT

11:00 - 11:30

Cyber Secure Communication for Automation Devices – Legal Regulations, Market Trends and Solutions Thierry Bieber, HMS Industrial Networks

Is your industrial automation device cyber secure? With the digital transformation new communication channels connect production equipment with dedicated IoT application increasing so the risks for cyber-attacks on manufacturing applications. Indeed, hackers are targeting nowadays directly automation devices or even using dedicated industrial protocols to achieve their goals. New regulations regarding the security like the IoT Law of California or specifications like the IEC62443 are trying to mitigate these new risks. What are the market requirements for security in automation devices? What is the status of secure specification extensions for industrial protocol like OPC-UA, Modbus, EtherNet/IP or PROFINET? What are the challenges, impacts and opportunities related to a security implementation? Market Inputs and solutions for industrial device manufacturers to implement future proof communication interfaces without compromising the security required by the industrial application.

11:30 - 12:00

Firmware Integrity in the Quantum Age – How to Prepare Against Threats of Quantum Computing Now Martin Schläffer, Infineon Technologies

Due to their computing power, quantum computers are expected to have the disruptive potential to break various currently used cryptographic algorithms within the next 10 to 15 years. An often overlooked use-case for digital signatures is the integrity protection of firmware updates. Firmware update mechanisms are becoming more and more important for a fast introduction of new features and bugfixes into embedded devices. While the standardization of new PQC schemes is still ongoing until 2024, the IETF and NIST have published draft standards for so-called stateful hash-based signature schemes already now. Hash-based signatures such as LMS and XMSS are particularly suited for the protection of firmware updates due to their high security level based on hash functions (e.g., SHA-2). In this talk, we will introduce LMS and XMSS and especially discuss how they could be used already today as a first step to counteract the threat of quantum computers.

12:00 - 12:30

SIMs, eSIMs and Secure Elements: Providing a Roadmap to Dynamic Security and Flexible Control for Connected Devices Cyril Caillaud, Trusted Connectivity Alliance

The presentation will address the importance of remote management capabilities to ensure the longevity and integrity of devices and applications, through the delivery of dynamic security and operational updates. It will explain how the technologies are already proving to be flexible platforms capable of addressing many technical deployment challenges, as well as challenges associated with security use cases over a connected object’s lifetime. Topics that will be covered include: • An introduction to the role of the SIM, eSIM and SE as a secure, tiny computer which is capable of executing operating systems and programmes, keys and certificate data, and communicating with a device and its cloud service to provide dynamic security. • Current thinking on IoT security concerns and requirements: what industry influencers / governments are saying and doing.

12:30 - 12:45

Discussion/Q&A with Session Chair: Karlheinz Ronge

11:00 - 12:45

Session 4.13 Safety & Security: Security Architectures

11:00 - 11:30

Implementing the ARM Platform Security Architecture for Robust IoT Devices Trevor Martin, Hitex UK

The ARM Platform Security Architecture defines an abstract security model which can be applied to any standard Cortex-M based microcontroller. This paper will provide an introduction to the structure of the Security Model and show how the current “Trusted Firmware” reference platform can implemented on a Cortex-M33 based microcontroller.

11:30 - 12:00

uTango: Open Source TEE for TrustZone-M Devices Dr. Sandro Pinto, Universidade do Minho; Daniel Oliveira, University of Minho

For more than a decade, TrustZone has been pivotal for securing hundreds of millions of mobiles worldwide. Recently, steamed by the Internet of Things (IoT), Arm decided to add TrustZone-M to its new generation of microcontrollers. In response, established Trusted Execution Environment (TEE) vendors have started to shift and adapt existing solutions from mobiles to IoT devices. However, the root causes of the security flaws affecting TrustZone-assisted TEEs remain still to be addressable. This session discusses (1) why the TrustZone dual-world security model has intrinsic limitations and (2) how existing TrustZone-M building blocks may be leveraged to create a multi-world TEE. The audience will get a look into the open source uTango project and the ground-breaking approach to creating an unlimited number of equally-secure execution environments. The talk will cover several design decisions and implementation details, as well as an extensive evaluation in a real TrustZone-M platform.

12:00 - 12:30

Porting and Running OP-TEE on ARMv8 devices Sergio Prado, Embedded Labworks

A Trusted Execution Environment (TEE) is an environment where the code executed and the data accessed is isolated and protected in terms of confidentiality and integrity. And a lot of devices nowadays make use of a Trusted Execution Environment, including smartphones, set-top-boxes, videogame consoles and Smart TVs. OP-TEE (Open Portable Trusted Execution Environment) is an open-source TEE designed as a companion to a non-secure Linux kernel running on ARM Cortex-A cores using ARM's TrustZone technology. In this presentation, we will take a hands-on approach to learn how to port and run OP-TEE on an ARMv8-A device.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Peter Fromm

11:00 - 12:45

Session 6.13 Software & Systems-Engineering: Testing & Debugging

11:00 - 11:30

Standardisation of Software Testing...a Necessary Evil? Andrew Banks, LDRA

Software testing is an integral process of the development lifecycle. However it has traditionally been informally defined, and “best practice” not captured in applicable standards. Many view this as the ideal situation. It allows freedom to test appropriately for the project without incurring any additional bureaucracy, while keeping the black arts of testing sacred. This particularly appeals to the Agile community. However, more formality is frequently required, resulting in the ISO/IEC/IEEE 29119 family of standards which have evolved from existing national standards. This paper will try to address the controversy surrounding standardization in software testing. It will discuss the ISO/IEC/IEEE 29119 family of standards and their place in the software development lifecycle, and how tailoring of the process can help improve software testing.

11:30 - 12:00

Self-testing in Embedded Systems Colin Walls, Mentor, a Siemens Business

All electronic systems carry the possibility of failure. An embedded system has intrinsic intelligence that facilitates the possibility of predicting failure and mitigating its effects. This paper reviews the options for self-testing that are open to the embedded software developer. Testing algorithms for memory are outlined and some ideas for self-monitoring software in multi-tasking and multi-CPU systems are discussed.

12:00 - 12:30

Risking the New or Preserving the Old? – How to Preserve Treasures in Legacy Code Bases Ingo Nickles, Vector Informatik

In many cases time constraints are the reason for "unclean" implementations. Quite a few programmers face the challenge of editing legacy code that was written in a unique style or that has no or very little documentation. As long as only small code modifications have to be done, this may not be a big problem but what if the need for new features leads to big changes, an existing system has to be certified, quality problems cannot be solved or the hardware that has been used for years is no longer available? Every company has to decide at a certain point whether it is worthwhile to maintain the old sources or to rely on a completely new development. A new development often contains unpredictable risks. The basic question for and against a new development is, what is cheaper and results in faster success? Test automation, change-based testing and baseline testing offer a target-oriented alternative to a completely new development and preserve the know-how of previous developments.

12:30 - 12:45

Discussion/Q&A with Session Chair: Dr. Klaus Grimm

11:00 - 12:45

Session 7.4 Embedded Vision: SW Tools & Tooling AI & Tool Chains

11:00 - 11:30

Embedded Learning and the Evolution of Machine Vision Jonathan Hou, Pleora Technologies

This paper will provide an overview on the evolution of embedded learning for inspection, and provide practical advice on how manufacturers and integrations can deploy AI-based capabilities within existing systems and processes. The paper will cover: • The evolution of embedded technologies, and its role in powering new capabilities. • Where does AI offer advantages within inspection? Traditional vision skills still excel in certain areas, and the paper will discuss where AI can add insight. It will highlight how a “hybrid approach” that integrates AI with existing vision algorithms, infrastructure, and processes reduces costs and complexity. • How will AI influence future manufacturing processes, with a focus on cloud collaboration, the value of data, and the ability to implement global quality standards. • We will close the paper with a customer case study, covering their challenges, concerns, and how they are adopting AI for food and quality inspection applications.

11:30 - 12:00

Using Visual Inference in Edge Computing Jim White, IoTech

The use of cameras and visual inference engines for object detection is popular in many use cases. Using cameras and visual inference as another input into a multi-sensing computing platform that operates in real-time at the edge is more complex. In this session, learn how an open source IoT/edge platform (specifically EdgeX Foundry) was extended to include object detection along with other sensor data to improve decision making at the edge. Explore how visual inference along with RFID, vibration, and other sensors/devices allow an edge platform to form a more complete situational understanding. Learn how visual inference models were developed and trained in the cloud and then deployed to the edge. See how cameras were monitored and actuated as part of the platform to improve in the quality of inference results.

12:00 - 12:30

The Best of Both Worlds: Rule-based and AI for Embedded Vision Christoph Wagner, MVTec Software

Deep learning inference engines are on the advance. They are becoming an integral part of an ever-increasing number of embedded devices, allowing for the first time inference performance that is comparable to PCs running a mid-range GPU. At the same time, “regular” CPUs are becoming more powerful. Increasing performance of both CPU and inference engine allows to combine the best of both worlds. Hybrid approaches, combining deep learning with rule-based algorithms, are becoming increasingly important to the embedded market. The use of hybrid approaches makes results much more comprehensible compared to pure deep learning approaches. Particularly, in areas where transparency is a prerequisite, this leads to improved industrial suitability. This paper gives deeper insights into the development of hybrid approaches and how to benefit from them in the best possible way. It examines various examples and provides an outlook on the future of deep learning in the field of edge computing.

12:30 - 12:45

Discussion/Q&A with Session Chair: Prof. Dr. Stefan Hensel

11:00 - 12:45

Session 10.4 System-on-Chip: Core Integration & Tools

11:00 - 11:30

Jupyosys: From Browser to Silicon in Seconds Martin Strubel, section5 / Strubel SW solutions

The main hardware development languages VHDL and Verilog are dominating when it comes to synthesis to FPGA or ASIC elements. Other HDLs as SpinalHDL, Chisel or Python HDL modules such as MyHDL or migen rely on these V-Languages for transfer to final silicon. The OpenSource synthesis tool 'yosys' has changed this game such that synthesizeable elements can be directly created through its pyosys Python API. A MyHDL synthesizer front end could therefore be developed to translate functional hardware descriptions in Python directly to yosys primitives (Gates, Flipflops, Multiplexers, Memories, ...) and Co-simulate an inferred hardware (post-map) with a Python test bench or any other existing stimulation model using Opensource tools. This toolchain was integrated into a virtual machine running as a Jupyter notebook, allowing to document and interactively synthesize, display and simulate. Designs such as a RISC-V were verified to work on real hardware like Lattice ECP5 FPGAs.

11:30 - 12:00

Leveraging RISC-V Technology for Industry Use Prof. Robert Oshana, NXP Semiconductors; Rick O'Connor, OpenHW Group

The electronics industry is embracing open-source processor technologies like RISC-V at an unprecedented rate. This creates a need to develop a deep ecosystem to support adoption of the RISC-V ISA. This includes various components including processor implementations, verification suites, software middleware, stacks and tools - all aligned to move the architecture forward. In this session we will discuss how RISC-V technology is being used in the industry in various applications from microcontrollers for mass market, to automotive applications and industrial controllers.

12:00 - 12:30

Working Effectively With Standard and Custom RISC-V ISA Extensions Felipe Torrezan, IAR Systems

Around the RISC-V community, there is an ongoing process of standardizing a series of standard extensions beyond the integer base instructions which can be implemented or omitted as desired depending on the design. In addition, the RISC-V architecture offers flexibility for custom cores with the exact definitions needed for a specific application or product. The fact that you can use both standard and custom instruction provides full flexibility for innovation and differentiation without compromising code quality or performance. In this presentation, you will learn how to make the best use standard and custom extensions in the development of an embedded application based on RISC-V.

12:30 - 12:45

Discussion/Q&A with Session Chair: Farhad Mafie

Parallel Sessions

13:30 - 15:15

Session 1.14 IoT Use Cases

13:30 - 14:00

Revolutionary Asset Management Solutions Based on Semtech's LoRa Edge and LoRa Cloud Pedro Pachuca, Semtech

The following presentation provides a novel and revolutionary way to implement affordable asset management solution based on LoRaWAN technology. This presentation will describe the implementation of a full life-cycle device to cloud implementation under LoRaWAN; dramatically simplifying the process and reducing the cost of developing managed endpoints and geolocation solutions, making LoRA Technology more accessible to application developers. A complete picture on implementing and endpoint to cloud IoT solution is provided, taking the users on a step-by step journey including geolocation and device join services with a highly secure provision system that enables a fully secured end-device onboarding and network join process.

14:00 - 14:30

IoT Solutions in a Regional Utility's Ecosystem Philipp Schandelmaier-Treick, E-MAKS

14:30 - 15:00

The Battery Digital Twins John Milios, Sendyne

From electric vehicles to micro-grids to IoT devices, batteries are one of the most critical components. Monitoring and predicting their behavior is mission critical with a significant financial impact. Cloud computing drastically alters the concept of battery management, while big data and machine learning provide for a quicker evolution of battery technology. Different approaches have been proposed for the organization of battery’s digital twin, from pure data driven approaches to cloud-residing empirical adaptive models. We’ll present a physics-based “virtual battery” as the primitive building block for large-scale battery analytics. We will discuss how this approach can assist with real-time tracking of battery condition as well as the advantageous insights achieved over traditional onboard BMS diagnostics. Finally we'll illustrate the potential of this approach and present results obtained from actual aged cells.

15:00 - 15:15

Discussion/Q&A with Session Chair: Thilo Schumann

13:30 - 15:15

Session 4.14 Safety & Security: Long Term and Post-Quantum Security

13:30 - 14:00

A Long-term Security Concept for IoT Products Dr. Hans Herrmann, cogitron

Quantum computers will exhibit significantly higher computing power, capable of implementing and executing cryptoanalytic algorithms which render currently established encryption techniques ineffective. We like to address the question of how to secure current embedded components in long lasting products within the timeframe of the next 30 years. Through the depiction of a series of attacks and resulting defensive measures, we will develop a prototypic realization for a remote controlled embedded device. In this talk we elaborate on the recommendations of the Bundesamt fÃ¼r Sicherheit in der Informationstechnik (BSI). Subsequently we will address how to effectively shape the mass production of such devices. The central theme of the presentation is the recurring estimation of security levels for the discussed techniques, based on temporal aspects of their compromise. We will discuss typical use cases, their remaining weaknesses, and the achieved level of security.

14:00 - 14:30

Cyber Resiliency is Becoming Critical for All Embedded Systems, Dynamic Firmware Protections, Coupled to Effective Supply Chain Security will Become Mandatory Very Soon Eric Sivertson, Lattice Semiconductor; Mark Hoopes, Lattice Semiconductor

The concept of Cyber Resiliency is moving to a model of “dynamic trust” to secure firmware from unauthorized access. Within a rapidly evolving global supply chain, new technologies & capabilities will be required by standards bodies in all segments. Cyber resiliency comes via parallel & reactive responses to attacks in real-time. Firmware protection through a system’s lifecycle, beginning with manufacturing through the supply chain, to integration, and its overall operational lifetime will become mandatory to repel these growing attacks. The National Vulnerability Database reported between 2016 & 2019 firmware vulnerabilities grew 700+ percent, and Gartner reports by 2022 “70 percent of organizations that do not have a firmware upgrade plan in place will be breached due to a firmware vulnerability."

14:30 - 15:00

Finding N-day Security Vulnerabilities in Third-party Software Paul Anderson, GrammaTech

An N-day vulnerability is a known security problem for which a fix is available, but where the fix has not been applied due to oversight, poor practice, or misunderstanding. To identify such risky components, Software Composition Analysis tools are available to scan the source code for matches against a database of known code vulnerabilities in versioned components. This problem is particularly acute for organizations that receive software binary code from their suppliers because the source code is unavailable to scan. This talk introduces a new technique for identifying N-day vulnerabilities in binary components. Under the hood are a set of identification algorithms that use a variety of techniques including machine learning that work in concert to produce a software bill of materials enumerating the components used in the compilation of the binary. This is then cross-checked against vulnerability databases to produce a report that assesses the risk of the program as a whole.

15:00 - 15:15

Discussion/Q&A with Session Chair: Karlheinz Ronge

13:30 - 15:15

Session 6.14 Software & Systems-Engineering: Testing & Debugging

13:30 - 14:00

Software Testing Best Practices for Embedded Systems Prof. Robert Oshana, NXP Semiconductors

Testing embedded systems requires additional rigor than what may be applied to non-embedded systems. Performance and real-time requirements as well as additional levels of rigor due to functional safety requirements are some examples. In this course we will discuss a set of embedded testing best practices which builds on a set of industry proven approaches. After a quick review of basic white box and black box techniques, we will discuss effective approaches to hueristic based testing using tried and true templates such as the Phoenix checklist. We'll discuss how to think like the "Thinkertoy" model of problem solving. We will review some of the differentiated techniques to use at each level of the testing "V" model, tailored to embedded software.

14:00 - 14:30

Agile Test Orchestration for Embedded Software Dr. James Hui, Wind River

Embedded system development is a team sport. It combines knowledge from multi-disciplinary teams, which might introduce challenges such as uncertainty in requirements and ambiguity in design handover. By adopting continuous testing, a technique commonly used in the Agile methodology, team can gain insights into the system both before and during implementation, which improves team communication, software quality and delivery speed. In this talk, we will share our experience on creating a practical DevOps pipeline that orchestrates embedded software tests on demand with containers and Kubernetes, in order to make decisions more traceable, measurable and repeatable. Also, a clear test workflow helps improve collaboration and create shared values, and as a result – greater confidence in product delivery.

14:30 - 15:00

Dominate Advanced Trace in Your RISC-V Core IP Shawn Prestridge, IAR Systems

Have you ever tried to debug an issue that only pops up randomly? This session will show how full code trace can help you quickly diagnose common problems that are nearly impossible to find otherwise. Trace enables powerful debugging capabilities in your development and debugging tools by gaining complete control of every line of code and every single instruction executed in your complex application. Join this session to see how to diagnose a hard fault, to quickly isolate stack overflow issues, and to use performance monitoring to identify hotspots in your code. We will also show you some other ways to leverage trace in order to quickly take control of your development.

15:00 - 15:15

Discussion/Q&A with Session Chair: Dr. Klaus Grimm

13:30 - 15:15

Session 7.5 Embedded Vision

13:30 - 14:00

Embedded IoT Application with Computer Vision and OpenVINO Oluwatobi Oyinlola, Intel

Computer vision is growing rapidly with the element of embedded system device that has the capability of using various tool kits, during my session i will explaining the layer of using computer vision with Intel OpenVINO tool kits which help with building quick computer vision application at the edge.

14:00 - 14:30

Optimising Neutral Networks With a Holistic Vie of IoT, Cloud and Edge Using Information Reduction Pipeline Concept Marc Suhle, Basler; Mark Hebbel, Basler

Due to the complexity of modern IoT Systems companies must specialise in their areas. Good starndardisation of Interfaces allows the Separation of duties and has helped until now to bring fotrth exciting technologies. However the separation has always been based on Features and not optimisation. For simple examples like temperature readouts this is fine, but when one considers Systems with cameras, the amount of data being generated by the camera has to be reduced step by step or risks in "flooding" the later Systems. This paper introduces a holistic definiftion of this data reduction (or Information enhancement) Pipeline allowing better optimisation over the process and less waste for companies and customers concerned. It also discusses the System strategies (and relevant Technologies) to implement such a data reduction and optimisation pipleline.

14:30 - 15:00

Multimedia Performance Tuning Marcel Ziswiler, Toradex

More and more Embedded Linux systems, be it headless or with an actual display connected, are used in one form or another to process and/or display multimedia content. As with other Embedded systems aspects dealing with real-time deadlines to meet such multimedia requirements requires careful performance tuning. To e.g. process a 30 frame per second video one only gets 33 milliseconds to process one entire frame. This talk gives an overview about GStreamer usage on Embedded Linux systems and details the whole video pipeline starting from a CSI camera connected to the SoC's camera interface, going through its Coda/Hantro encoder and finally streaming via RTP over Ethernet. A second use-case will look at an Embedded Linux system receiving such a stream, decompress it and displaying it to an actual display. Further topics covered include pipeline profiling, configuration and buffer/queue optimisations required for smooth video processing. This talk will conclude with a live demonstration.

15:00 - 15:15

Discussion/Q&A with Session Chair: Prof. Dr. Stefan Hensel

13:30 - 15:15

Session 10.5 System-on-Chip: Core Integration & Tools

13:30 - 14:00

Innovate by Customized Iinstructions, But Without Fragmenting the Ecosystem? Joseph Yiu, Arm

The Arm Custom Instructions, which was announced in October 2019, is now available in the Cortex-M33 processor. In this presentation, we will review some of the design considerations and decisions when we created this architecture extension, a range of design considerations when SoC designers deploy their hardware accelerators based on this technologies, and how it compares to the coprocessor interface features, which is already available on the Cortex-M33 processor since it launched. The presentation will also cover some of the uses cases that Arm has looked into, such as mathematics acclerators. Finally the presentation will also explain how software developers access the accelerator solutions implemented using the Arm Custom Instructions.

14:00 - 14:30

The Path to Ultra-low Power AI at the Edge James Peet, Cambridge Consultants

Delivering transformational products and services means taking artificial intelligence (AI) out of the data centre and into the real world. This talk analyzes the benefits and challenges of deploying AI applications on end-point devices. It outlines revolutionary features unlocked by edge AI technologies, as well as pitfalls to avoid during product development. It centres on learnings from a concept system developed by Cambridge Consultants to improve monitoring of treatment for tuberculosis (TB) in resource-limited countries. Originally a cloud-based application, a deep-learning algorithm was used to identify, count and classify TB cells in images captured by an ordinary smartphone and laboratory microscope. Cambridge Consultants has redeployed the network onto the latest Arm IP for low power AI workloads (Cortex-M55 and Ethos-U55). This proves that impactful levels of intelligence can be achieved without network connection by a low-cost camera or embedded into the microscope.

14:30 - 15:00

Exploiting Regularity for Compiling Manycore Architectures Andres Goens, TU Dresden

Novel manycore architectures increase the ceiling of maximal performance, but they also increase the difficulty in attaining it. The on-chip memory subsystem becomes central to ensuring performance. Cache coherence does not scale to hundreds or thousands of cores, making shared memory models significantly less viable. Thus, for efficiency, data and computation need to be mapped explicitly to hardware resources. However, assumptions about the topology permeate models currently used for programming multicores, making them unsuitable for manycores. In this presentation we discuss a systematic approach to consider heterogeneity and the topology of the network subsystem. Even heterogeneous architectures are built with a significant amount of symmetry. We show how we can use methods from computational (semi)group theory to exploit these symmetries. We leverage this mathematical framework in two use-cases, design-space exploration at compile time, and an efficient execution at runtime.

15:00 - 15:15

Discussion/Q&A with Session Chair: Farhad Mafie

Day 1 - Monday, 01. March 2021

Parallel Classes

13:30 - 18:00

Class 1.1 The Power of APIs and Containers on Embedded Switching

13:30 - 18:00

Class 3.1 Build Your Own Embedded Linux CI/CD Pipeline Using the Cloud

13:30 - 18:00

Class 4.1 Security Beyond Cryptography: Secure Enclave for Asymmetric Multi-processing

13:30 - 18:00

Class 6.1 Effective Use Cases, User Stories, and Scenarios

Day 2 - Tuesday, 02. March 2021

Parallel Classes

09:00 - 18:00

Class 5.1 Ultra Low Power Hands-on Workshop

09:00 - 18:00

Class 10.1 FPGA-Design Using C/C++ and High-Level Synthesis

Parallel Classes

13:30 - 18:00

Class 6.2 Agile for Embedded Systems

13:30 - 18:00

Class 6.3 The Greg Davis Class – Advanced C/C++ Coding and Debugging Techniques

Day 3 - Wednesday, 03. March 2021

Parallel Classes

09:00 - 18:00

Class 3.2 Embedded Android Workshop

09:00 - 12:30

Class 6.4 Creating Domain-Specific Modeling Languages: Hands-on

Parallel Classes

13:30 - 18:00

Class 5.2 Easy Design of IoT Wireless Devices Embedding Antennas

13:30 - 18:00

Class 6.5 Advanced Behavioral Modeling with UML/SysML: Activities

13:30 - 18:00

Class 6.6 Modern C++ for Embedded Development

Day 4 - Thursday, 04. March 2021

Parallel Classes

09:00 - 18:00

Class 3.3 Introduction to Embedded Linux in Theory and Practice – Short Crash Course

09:00 - 18:00

Class 3.4 Fast Track to Yocto Project

09:00 - 12:30

Class 6.7 How to Improve Software Quality Through Test Automation

Parallel Classes

13:30 - 18:00

Class 5.3 Production Optimized Hardware Design

13:30 - 18:00

Class 6.8 Advanced Behavioral Modeling with UML/SysML: State Machines

13:30 - 18:00

Class 8.1 Developing Artificial Intelligence Using Machine Learning at the Edge with Embedded μSoC FPGAs

Get in touch with us!

Juliane Heger
Senior Veranstaltungsreferentin
WEKA FACHMEDIEN GmbH

Phone: +49 89 25556 1155

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